Add DMAMUX
This commit is contained in:
Dario Nieuwenhuis
parent
983fa80ef3
commit
29f70ac45f
139
data/registers/dmamux_v1.yaml
Normal file
139
data/registers/dmamux_v1.yaml
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@ -0,0 +1,139 @@
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---
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block/DMAMUX:
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description: DMAMUX
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items:
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- name: CCR
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description: DMAMux - DMA request line multiplexer channel x control register
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array:
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len: 16
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stride: 4
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byte_offset: 0
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fieldset: CCR
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- name: CSR
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description: DMAMUX request line multiplexer interrupt channel status register
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byte_offset: 128
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access: Read
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fieldset: CSR
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- name: CFR
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description: DMAMUX request line multiplexer interrupt clear flag register
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byte_offset: 132
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access: Write
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fieldset: CFR
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- name: RGCR
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description: DMAMux - DMA request generator channel x control register
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array:
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len: 8
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stride: 4
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byte_offset: 256
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fieldset: RGCR
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- name: RGSR
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description: DMAMux - DMA request generator status register
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byte_offset: 320
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access: Read
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fieldset: RGSR
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- name: RGCFR
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description: DMAMux - DMA request generator clear flag register
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byte_offset: 324
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access: Write
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fieldset: RGSR
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fieldset/CCR:
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description: DMAMux - DMA request line multiplexer channel x control register
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fields:
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- name: DMAREQ_ID
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description: Input DMA request line selected
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bit_offset: 0
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bit_size: 8
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- name: SOIE
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description: Interrupt enable at synchronization event overrun
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bit_offset: 8
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bit_size: 1
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- name: EGE
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description: Event generation enable/disable
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bit_offset: 9
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bit_size: 1
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- name: SE
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description: Synchronous operating mode enable/disable
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bit_offset: 16
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bit_size: 1
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- name: SPOL
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description: "Synchronization event type selector Defines the synchronization event on the selected synchronization input:"
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bit_offset: 17
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bit_size: 2
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enum: POL
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- name: NBREQ
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description: "Number of DMA requests to forward Defines the number of DMA requests forwarded before output event is generated. In synchronous mode, it also defines the number of DMA requests to forward after a synchronization event, then stop forwarding. The actual number of DMA requests forwarded is NBREQ+1. Note: This field can only be written when both SE and EGE bits are reset."
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bit_offset: 19
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bit_size: 5
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- name: SYNC_ID
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description: Synchronization input selected
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bit_offset: 24
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bit_size: 5
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fieldset/CFR:
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description: DMAMUX request line multiplexer interrupt clear flag register
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fields:
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- name: CSOF
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description: Clear synchronization overrun event flag
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bit_offset: 0
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bit_size: 1
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array:
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len: 16
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stride: 1
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fieldset/CSR:
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description: DMAMUX request line multiplexer interrupt channel status register
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fields:
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- name: SOF
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description: Synchronization overrun event flag
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bit_offset: 0
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bit_size: 1
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array:
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len: 16
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stride: 1
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fieldset/RGCR:
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description: DMAMux - DMA request generator channel x control register
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fields:
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- name: SIG_ID
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description: DMA request trigger input selected
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bit_offset: 0
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bit_size: 5
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- name: OIE
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description: Interrupt enable at trigger event overrun
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bit_offset: 8
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bit_size: 1
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- name: GE
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description: DMA request generator channel enable/disable
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bit_offset: 16
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bit_size: 1
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- name: GPOL
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description: DMA request generator trigger event type selection Defines the trigger event on the selected DMA request trigger input
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bit_offset: 17
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bit_size: 2
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enum: POL
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- name: GNBREQ
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description: "Number of DMA requests to generate Defines the number of DMA requests generated after a trigger event, then stop generating. The actual number of generated DMA requests is GNBREQ+1. Note: This field can only be written when GE bit is reset."
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bit_offset: 19
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bit_size: 5
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fieldset/RGSR:
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description: DMAMux - DMA request generator status register
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fields:
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- name: OF
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description: "Trigger event overrun flag The flag is set when a trigger event occurs on DMA request generator channel x, while the DMA request generator counter value is lower than GNBREQ. The flag is cleared by writing 1 to the corresponding COFx bit in DMAMUX_RGCFR register."
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bit_offset: 0
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bit_size: 1
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array:
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len: 8
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stride: 1
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enum/POL:
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bit_size: 2
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variants:
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- name: NoEdge
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description: "No event, i.e. no synchronization nor detection"
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value: 0
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- name: RisingEdge
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description: Rising edge
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value: 1
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- name: FallingEdge
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description: Falling edge
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value: 2
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- name: BothEdges
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description: Rising and falling edges
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value: 3
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43
parse.py
43
parse.py
@ -350,6 +350,7 @@ perimap = [
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('.*:STM32WL_dbgmcu_v1_0', 'dbgmcu_wl/DBGMCU'),
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('.*:IPCC:v1_0', 'ipcc_v1/IPCC'),
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('.*:DMAMUX:v1', 'dmamux_v1/DMAMUX'),
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]
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rng_clock_map = [
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@ -658,6 +659,18 @@ def parse_chips():
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})
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peris[dma] = p
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# DMAMUX is not in the cubedb XMLs
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for dma in ('DMAMUX', 'DMAMUX1', "DMAMUX2"):
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if addr := defines.get(dma+'_BASE'):
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kind = 'DMAMUX:v1'
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dbg_peri = OrderedDict({
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'address': addr,
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'kind': kind,
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})
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if block := match_peri(kind):
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dbg_peri['block'] = block
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peris[dma] = dbg_peri
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# EXTI is not in the cubedb XMLs
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if addr := defines.get('EXTI_BASE'):
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if chip_name.startswith("STM32WB55"):
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@ -755,13 +768,15 @@ def parse_gpio_af():
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pins[pin_name] = afs
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#with open('data/gpio_af/'+ff+'.yaml', 'w') as f:
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#f.write(yaml.dump(pins))
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# with open('data/gpio_af/'+ff+'.yaml', 'w') as f:
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# f.write(yaml.dump(pins))
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af[ff] = pins
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dma_channels = {}
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def parse_dma():
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for f in glob('sources/cubedb/mcu/IP/DMA-*Modes.xml'):
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@ -800,18 +815,18 @@ def parse_dma():
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if event not in peri_dma['requests']:
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peri_dma['requests'][event] = request_num
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#event_dma = peri_dma['requests'][event]
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#event_dma.append( OrderedDict( {
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#'channel': 'DMAMUX',
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#'request': request_num
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#} ))
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# event_dma.append( OrderedDict( {
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# 'channel': 'DMAMUX',
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# 'request': request_num
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# } ))
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request_num += 1
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for n in dma_peri_name.split(","):
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n = n.strip();
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if result := re.match( '.*' + n + '_Channel\[(\d+)-(\d+)\]', channels[0]['@Name'] ):
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n = n.strip()
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if result := re.match('.*' + n + '_Channel\[(\d+)-(\d+)\]', channels[0]['@Name']):
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low = int(result.group(1))
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high = int(result.group(2))
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for i in range(low,high+1):
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chip_dma['channels'][n+'_'+str(i)] = OrderedDict( {
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for i in range(low, high+1):
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chip_dma['channels'][n+'_'+str(i)] = OrderedDict({
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'dma': n,
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'channel': i,
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})
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@ -821,7 +836,7 @@ def parse_dma():
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channel_name = removeprefix(channel_name, dma_peri_name + '_')
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channel_name = removeprefix(channel_name, "Channel")
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channel_name = removeprefix(channel_name, "Stream")
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chip_dma['channels'][dma_peri_name + '_' + channel_name] = OrderedDict( {
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chip_dma['channels'][dma_peri_name + '_' + channel_name] = OrderedDict({
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'dma': dma_peri_name,
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'channel': int(channel_name),
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})
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@ -832,7 +847,7 @@ def parse_dma():
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parts = target_name.split('_')
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target_peri_name = parts[0]
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if len(parts) < 2:
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target_events = [ target_peri_name ]
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target_events = [target_peri_name]
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else:
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target_events = target_name.split('_')[1].split('/')
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if target_name != 'MEMTOMEM':
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@ -847,11 +862,13 @@ def parse_dma():
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if event not in peri_dma:
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peri_dma['channels'][event] = []
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event_dma = peri_dma['channels'][event]
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event_dma.append( dma_peri_name + '_' + channel_name )
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event_dma.append(dma_peri_name + '_' + channel_name)
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dma_channels[ff] = chip_dma
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clocks = {}
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def parse_clocks():
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for f in glob('sources/cubedb/mcu/IP/RCC-*rcc_v1_0_Modes.xml'):
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ff = removeprefix(f, 'sources/cubedb/mcu/IP/RCC-')
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