guangzong/stm32-data
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Merge pull request #319 from eZioPan/rtc-cleanup

Browse Source 
rtc-cleanup
This commit is contained in:
Dario Nieuwenhuis 2023-12-24 12:09:26 +00:00 committed by GitHub
commit 25c76eb0c8
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
13 changed files with 61 additions and 431 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
data/registers/rtc_v1.yaml
View File

@ -110,10 +110,9 @@ fieldset/CRL:
bit_offset: 3
bit_size: 1
- name: CNF
description: Configuration flag
description: Enter configuration mode
bit_offset: 4
bit_size: 1
enum: CNF
- name: RTOFF
description: RTC operation OFF
bit_offset: 5
@ -147,21 +146,12 @@ fieldset/PRLL:
description: Prescaler divider register low
bit_offset: 0
bit_size: 16
enum/CNF:
bit_size: 1
variants:
- name: Exit
description: Exit configuration mode (start update of RTC registers)
value: 0
- name: Enter
description: Enter configuration mode
value: 1
enum/RTOFF:
bit_size: 1
variants:
- name: Enabled
- name: Ongoing
description: Last write operation on RTC registers is still ongoing
value: 0
- name: Disabled
- name: Terminated
description: Last write operation on RTC registers terminated
value: 1

40
data/registers/rtc_v2f0.yaml
View File

@ -206,7 +206,6 @@ fieldset/CR:
description: Reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: BYPSHAD
description: Bypass the shadow registers
bit_offset: 5
@ -312,15 +311,14 @@ fieldset/ISR:
description: Initialization and status register
fields:
- name: ALRWF
description: Alarm write flag
description: Alarm write enabled
bit_offset: 0
bit_size: 1
array:
len: 1
stride: 1
enum: ALRWF
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write enabled
bit_offset: 2
bit_size: 1
- name: SHPF
@ -340,10 +338,9 @@ fieldset/ISR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: ALRF
description: Alarm flag
bit_offset: 8
@ -594,10 +591,10 @@ fieldset/WUTR:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -618,15 +615,6 @@ enum/ALRMR_WDSEL:
- name: WeekDay
description: DU[3:0] represents the week day. DT[1:0] is don’t care
value: 1
enum/ALRWF:
bit_size: 1
variants:
- name: UpdateNotAllowed
description: Alarm update not allowed
value: 0
- name: UpdateAllowed
description: Alarm update allowed
value: 1
enum/AMPM:
bit_size: 1
variants:
@ -675,15 +663,6 @@ enum/FMT:
- name: AM_PM
description: AM/PM hour format
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/OSEL:
bit_size: 2
variants:
@ -723,15 +702,6 @@ enum/POL:
- name: Low
description: The pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL[1:0])
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/TAMPFLT:
bit_size: 2
variants:

40
data/registers/rtc_v2f2.yaml
View File

@ -162,7 +162,6 @@ fieldset/CR:
description: Reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: FMT
description: Hour format
bit_offset: 6
@ -262,15 +261,14 @@ fieldset/ISR:
description: Initialization and status register
fields:
- name: ALRWF
description: Alarm write flag
description: Alarm write enabled
bit_offset: 0
bit_size: 1
array:
len: 2
stride: 1
enum: ALRWF
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write enabled
bit_offset: 2
bit_size: 1
- name: INITS
@ -286,10 +284,9 @@ fieldset/ISR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: ALRF
description: Alarm flag
bit_offset: 8
@ -465,10 +462,10 @@ fieldset/WUTR:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -489,15 +486,6 @@ enum/ALRMR_WDSEL:
- name: WeekDay
description: DU[3:0] represents the week day. DT[1:0] is don’t care
value: 1
enum/ALRWF:
bit_size: 1
variants:
- name: UpdateNotAllowed
description: Alarm update not allowed
value: 0
- name: UpdateAllowed
description: Alarm update allowed
value: 1
enum/AMPM:
bit_size: 1
variants:
@ -507,15 +495,6 @@ enum/AMPM:
- name: PM
description: PM
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/OSEL:
bit_size: 2
variants:
@ -540,15 +519,6 @@ enum/POL:
- name: Low
description: The pin is low when ALRAF/ALRBF/WUTF is asserted (depending on OSEL[1:0])
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/TAMPTRG:
bit_size: 1
variants:

40
data/registers/rtc_v2f3.yaml
View File

@ -206,7 +206,6 @@ fieldset/CR:
description: Reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: BYPSHAD
description: Bypass the shadow registers
bit_offset: 5
@ -312,15 +311,14 @@ fieldset/ISR:
description: Initialization and status register
fields:
- name: ALRWF
description: Alarm write flag
description: Alarm write enabled
bit_offset: 0
bit_size: 1
array:
len: 2
stride: 1
enum: ALRWF
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write enabled
bit_offset: 2
bit_size: 1
- name: SHPF
@ -340,10 +338,9 @@ fieldset/ISR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: ALRF
description: Alarm flag
bit_offset: 8
@ -593,10 +590,10 @@ fieldset/WUTR:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -617,15 +614,6 @@ enum/ALRMR_WDSEL:
- name: WeekDay
description: DU[3:0] represents the week day. DT[1:0] is don’t care
value: 1
enum/ALRWF:
bit_size: 1
variants:
- name: UpdateNotAllowed
description: Alarm update not allowed
value: 0
- name: UpdateAllowed
description: Alarm update allowed
value: 1
enum/AMPM:
bit_size: 1
variants:
@ -674,15 +662,6 @@ enum/FMT:
- name: AM_PM
description: AM/PM hour format
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/OSEL:
bit_size: 2
variants:
@ -731,15 +710,6 @@ enum/RECALPF:
- name: Pending
description: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/TAMPFLT:
bit_size: 2
variants:

40
data/registers/rtc_v2f4.yaml
View File

@ -221,7 +221,6 @@ fieldset/CR:
description: Reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: BYPSHAD
description: Bypass the shadow registers
bit_offset: 5
@ -331,15 +330,14 @@ fieldset/ISR:
description: Initialization and status register
fields:
- name: ALRWF
description: Alarm write flag
description: Alarm write allowed
bit_offset: 0
bit_size: 1
array:
len: 2
stride: 1
enum: ALRWF
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write allowed
bit_offset: 2
bit_size: 1
- name: SHPF
@ -359,10 +357,9 @@ fieldset/ISR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: ALRF
description: Alarm flag
bit_offset: 8
@ -594,10 +591,10 @@ fieldset/WUTR:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -618,15 +615,6 @@ enum/ALRMR_WDSEL:
- name: WeekDay
description: DU[3:0] represents the week day. DT[1:0] is don’t care
value: 1
enum/ALRWF:
bit_size: 1
variants:
- name: UpdateNotAllowed
description: Alarm update not allowed
value: 0
- name: UpdateAllowed
description: Alarm update allowed
value: 1
enum/AMPM:
bit_size: 1
variants:
@ -675,15 +663,6 @@ enum/FMT:
- name: AM_PM
description: AM/PM hour format
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/OSEL:
bit_size: 2
variants:
@ -714,15 +693,6 @@ enum/RECALPF:
- name: Pending
description: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/TAMPFLT:
bit_size: 2
variants:

40
data/registers/rtc_v2f7.yaml
View File

@ -210,7 +210,6 @@ fieldset/CR:
description: Reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: BYPSHAD
description: Bypass the shadow registers
bit_offset: 5
@ -320,15 +319,14 @@ fieldset/ISR:
description: Initialization and status register
fields:
- name: ALRWF
description: Alarm write flag
description: Alarm write enabled
bit_offset: 0
bit_size: 1
array:
len: 2
stride: 1
enum: ALRWF
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write enabled
bit_offset: 2
bit_size: 1
- name: SHPF
@ -348,10 +346,9 @@ fieldset/ISR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: ALRF
description: Alarm flag
bit_offset: 8
@ -609,10 +606,10 @@ fieldset/WUTR:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -633,15 +630,6 @@ enum/ALRMR_WDSEL:
- name: WeekDay
description: DU[3:0] represents the week day. DT[1:0] is don’t care
value: 1
enum/ALRWF:
bit_size: 1
variants:
- name: UpdateNotAllowed
description: Alarm update not allowed
value: 0
- name: UpdateAllowed
description: Alarm update allowed
value: 1
enum/AMPM:
bit_size: 1
variants:
@ -690,15 +678,6 @@ enum/FMT:
- name: AM_PM
description: AM/PM hour format
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/OSEL:
bit_size: 2
variants:
@ -729,15 +708,6 @@ enum/RECALPF:
- name: Pending
description: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/TAMPFLT:
bit_size: 2
variants:

40
data/registers/rtc_v2h7.yaml
View File

@ -210,7 +210,6 @@ fieldset/CR:
description: Reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: BYPSHAD
description: Bypass the shadow registers
bit_offset: 5
@ -320,15 +319,14 @@ fieldset/ISR:
description: Initialization and status register
fields:
- name: ALRWF
description: Alarm write flag
description: Alarm write enabled
bit_offset: 0
bit_size: 1
array:
len: 2
stride: 1
enum: ALRWF
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write enabled
bit_offset: 2
bit_size: 1
- name: SHPF
@ -348,10 +346,9 @@ fieldset/ISR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: ALRF
description: Alarm flag
bit_offset: 8
@ -609,10 +606,10 @@ fieldset/WUTR:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -633,15 +630,6 @@ enum/ALRMR_WDSEL:
- name: WeekDay
description: DU[3:0] represents the week day. DT[1:0] is don’t care
value: 1
enum/ALRWF:
bit_size: 1
variants:
- name: UpdateNotAllowed
description: Alarm update not allowed
value: 0
- name: UpdateAllowed
description: Alarm update allowed
value: 1
enum/AMPM:
bit_size: 1
variants:
@ -690,15 +678,6 @@ enum/FMT:
- name: AM_PM
description: AM/PM hour format
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/OSEL:
bit_size: 2
variants:
@ -729,15 +708,6 @@ enum/RECALPF:
- name: Pending
description: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/TAMPFLT:
bit_size: 2
variants:

40
data/registers/rtc_v2l0.yaml
View File

@ -210,7 +210,6 @@ fieldset/CR:
description: Reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: BYPSHAD
description: Bypass the shadow registers
bit_offset: 5
@ -316,15 +315,14 @@ fieldset/ISR:
description: Initialization and status register
fields:
- name: ALRWF
description: Alarm write flag
description: Alarm write enabled
bit_offset: 0
bit_size: 1
array:
len: 2
stride: 1
enum: ALRWF
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write enabled
bit_offset: 2
bit_size: 1
- name: SHPF
@ -344,10 +342,9 @@ fieldset/ISR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: ALRF
description: Alarm flag
bit_offset: 8
@ -601,10 +598,10 @@ fieldset/WUTR:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -625,15 +622,6 @@ enum/ALRMR_WDSEL:
- name: WeekDay
description: DU[3:0] represents the week day. DT[1:0] is don’t care
value: 1
enum/ALRWF:
bit_size: 1
variants:
- name: UpdateNotAllowed
description: Alarm update not allowed
value: 0
- name: UpdateAllowed
description: Alarm update allowed
value: 1
enum/AMPM:
bit_size: 1
variants:
@ -682,15 +670,6 @@ enum/FMT:
- name: AM_PM
description: AM/PM hour format
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/OSEL:
bit_size: 2
variants:
@ -721,15 +700,6 @@ enum/RECALPF:
- name: Pending
description: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/TAMPFLT:
bit_size: 2
variants:

40
data/registers/rtc_v2l1.yaml
View File

@ -221,7 +221,6 @@ fieldset/CR:
description: Reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: BYPSHAD
description: Bypass the shadow registers
bit_offset: 5
@ -331,15 +330,14 @@ fieldset/ISR:
description: Initialization and status register
fields:
- name: ALRWF
description: Alarm write flag
description: Alarm write enabled
bit_offset: 0
bit_size: 1
array:
len: 2
stride: 1
enum: ALRWF
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write enabled
bit_offset: 2
bit_size: 1
- name: SHPF
@ -359,10 +357,9 @@ fieldset/ISR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: ALRF
description: Alarm flag
bit_offset: 8
@ -588,10 +585,10 @@ fieldset/WUTR:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -612,15 +609,6 @@ enum/ALRMR_WDSEL:
- name: WeekDay
description: DU[3:0] represents the week day. DT[1:0] is don’t care
value: 1
enum/ALRWF:
bit_size: 1
variants:
- name: UpdateNotAllowed
description: Alarm update not allowed
value: 0
- name: UpdateAllowed
description: Alarm update allowed
value: 1
enum/AMPM:
bit_size: 1
variants:
@ -669,15 +657,6 @@ enum/FMT:
- name: AM_PM
description: AM/PM hour format
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/OSEL:
bit_size: 2
variants:
@ -708,15 +687,6 @@ enum/RECALPF:
- name: Pending
description: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/TAMPFLT:
bit_size: 2
variants:

40
data/registers/rtc_v2l4.yaml
View File

@ -210,7 +210,6 @@ fieldset/CR:
description: Reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: BYPSHAD
description: Bypass the shadow registers
bit_offset: 5
@ -320,15 +319,14 @@ fieldset/ISR:
description: Initialization and status register
fields:
- name: ALRWF
description: Alarm write flag
description: Alarm write enabled
bit_offset: 0
bit_size: 1
array:
len: 2
stride: 1
enum: ALRWF
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write enabled
bit_offset: 2
bit_size: 1
- name: SHPF
@ -348,10 +346,9 @@ fieldset/ISR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: ALRF
description: Alarm flag
bit_offset: 8
@ -605,10 +602,10 @@ fieldset/WUTR:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -629,15 +626,6 @@ enum/ALRMR_WDSEL:
- name: WeekDay
description: DU[3:0] represents the week day. DT[1:0] is don’t care
value: 1
enum/ALRWF:
bit_size: 1
variants:
- name: UpdateNotAllowed
description: Alarm update not allowed
value: 0
- name: UpdateAllowed
description: Alarm update allowed
value: 1
enum/AMPM:
bit_size: 1
variants:
@ -686,15 +674,6 @@ enum/FMT:
- name: AM_PM
description: AM/PM hour format
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/OSEL:
bit_size: 2
variants:
@ -725,15 +704,6 @@ enum/RECALPF:
- name: Pending
description: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/TAMPFLT:
bit_size: 2
variants:

40
data/registers/rtc_v2wb.yaml
View File

@ -210,7 +210,6 @@ fieldset/CR:
description: Reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: BYPSHAD
description: Bypass the shadow registers
bit_offset: 5
@ -320,15 +319,14 @@ fieldset/ISR:
description: Initialization and status register
fields:
- name: ALRWF
description: Alarm write flag
description: Alarm write enabled
bit_offset: 0
bit_size: 1
array:
len: 2
stride: 1
enum: ALRWF
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write enabled
bit_offset: 2
bit_size: 1
- name: SHPF
@ -348,10 +346,9 @@ fieldset/ISR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: ALRF
description: Alarm flag
bit_offset: 8
@ -609,10 +606,10 @@ fieldset/WUTR:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -633,15 +630,6 @@ enum/ALRMR_WDSEL:
- name: WeekDay
description: DU[3:0] represents the week day. DT[1:0] is don’t care
value: 1
enum/ALRWF:
bit_size: 1
variants:
- name: UpdateNotAllowed
description: Alarm update not allowed
value: 0
- name: UpdateAllowed
description: Alarm update allowed
value: 1
enum/AMPM:
bit_size: 1
variants:
@ -690,15 +678,6 @@ enum/FMT:
- name: AM_PM
description: AM/PM hour format
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/OSEL:
bit_size: 2
variants:
@ -729,15 +708,6 @@ enum/RECALPF:
- name: Pending
description: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/TAMPFLT:
bit_size: 2
variants:

38
data/registers/rtc_v3.yaml
View File

@ -227,7 +227,6 @@ fieldset/CR:
description: RTC_REFIN reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: BYPSHAD
description: Bypass the shadow registers
bit_offset: 5
@ -318,7 +317,6 @@ fieldset/CR:
description: TAMPALRM pull-up enable
bit_offset: 29
bit_size: 1
enum: TAMPALRM_PU
- name: TAMPALRM_TYPE
description: TAMPALRM output type
bit_offset: 30
@ -363,7 +361,7 @@ fieldset/ICSR:
description: Initialization control and status register
fields:
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write enabled
bit_offset: 2
bit_size: 1
- name: SHPF
@ -383,10 +381,9 @@ fieldset/ICSR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: BIN
description: Binary mode
bit_offset: 8
@ -666,10 +663,10 @@ enum/ALRMF:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -795,15 +792,6 @@ enum/FMT:
- name: AmPm
description: AM/PM hour format
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/ITSF:
bit_size: 1
variants:
@ -867,15 +855,6 @@ enum/RECALPF:
- name: Pending
description: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/SSRUF:
bit_size: 1
variants:
@ -888,15 +867,6 @@ enum/SSRUMF:
- name: Underflow
description: This flag is set by hardware when the SSR rolls under 0. SSRUF is not set when SSCLR=1
value: 1
enum/TAMPALRM_PU:
bit_size: 1
variants:
- name: NoPullUp
description: No pull-up is applied on TAMPALRM output
value: 0
- name: PullUp
description: A pull-up is applied on TAMPALRM output
value: 1
enum/TAMPALRM_TYPE:
bit_size: 1
variants:

38
data/registers/rtc_v3u5.yaml
View File

@ -240,7 +240,6 @@ fieldset/CR:
description: RTC_REFIN reference clock detection enable (50 or 60 Hz)
bit_offset: 4
bit_size: 1
enum: REFCKON
- name: BYPSHAD
description: Bypass the shadow registers
bit_offset: 5
@ -338,7 +337,6 @@ fieldset/CR:
description: TAMPALRM pull-up enable
bit_offset: 29
bit_size: 1
enum: TAMPALRM_PU
- name: TAMPALRM_TYPE
description: TAMPALRM output type
bit_offset: 30
@ -383,7 +381,7 @@ fieldset/ICSR:
description: Initialization control and status register
fields:
- name: WUTWF
description: Wakeup timer write flag
description: Wakeup timer write enabled
bit_offset: 2
bit_size: 1
- name: SHPF
@ -403,10 +401,9 @@ fieldset/ICSR:
bit_offset: 6
bit_size: 1
- name: INIT
description: Initialization mode
description: Enter Initialization mode
bit_offset: 7
bit_size: 1
enum: INIT
- name: BIN
description: Binary mode
bit_offset: 8
@ -779,10 +776,10 @@ enum/ALRMF:
enum/ALRMR_MSK:
bit_size: 1
variants:
- name: Mask
- name: ToMatch
description: Alarm set if the date/day match
value: 0
- name: NotMask
- name: NotMatch
description: Date/day don’t care in Alarm comparison
value: 1
enum/ALRMR_PM:
@ -908,15 +905,6 @@ enum/FMT:
- name: AmPm
description: AM/PM hour format
value: 1
enum/INIT:
bit_size: 1
variants:
- name: FreeRunningMode
description: Free running mode
value: 0
- name: InitMode
description: Initialization mode used to program time and date register (RTC_TR and RTC_DR), and prescaler register (RTC_PRER). Counters are stopped and start counting from the new value when INIT is reset.
value: 1
enum/ITSF:
bit_size: 1
variants:
@ -980,15 +968,6 @@ enum/RECALPF:
- name: Pending
description: The RECALPF status flag is automatically set to 1 when software writes to the RTC_CALR register, indicating that the RTC_CALR register is blocked. When the new calibration settings are taken into account, this bit returns to 0
value: 1
enum/REFCKON:
bit_size: 1
variants:
- name: Disabled
description: RTC_REFIN detection disabled
value: 0
- name: Enabled
description: RTC_REFIN detection enabled
value: 1
enum/SSRUF:
bit_size: 1
variants:
@ -1001,15 +980,6 @@ enum/SSRUMF:
- name: Underflow
description: This flag is set by hardware when the SSR rolls under 0. SSRUF is not set when SSCLR=1
value: 1
enum/TAMPALRM_PU:
bit_size: 1
variants:
- name: NoPullUp
description: No pull-up is applied on TAMPALRM output
value: 0
- name: PullUp
description: A pull-up is applied on TAMPALRM output
value: 1
enum/TAMPALRM_TYPE:
bit_size: 1
variants: