From 250efb6c472c278a86b9c7eca7ce92f90c2835a6 Mon Sep 17 00:00:00 2001 From: Bob McWhirter Date: Mon, 17 May 2021 09:40:54 -0400 Subject: [PATCH] Regen SPIv3 chips (H7). --- parse.py | 1 + 1 file changed, 1 insertion(+) diff --git a/parse.py b/parse.py index ffc3af3..39782a0 100644 --- a/parse.py +++ b/parse.py @@ -231,6 +231,7 @@ perimap = [ ('.*:RNG:rng1_v3_1', 'rng_v1/RNG'), ('.*:SPI:spi2s1_v2_2', 'spi_v1/SPI'), ('.*:SPI:spi2s1_v3_3', 'spi_v2/SPI'), + ('.*:SPI:spi2s2_v1_1', 'spi_v3/SPI'), ('STM32F4.*:SYS:.*', 'syscfg_f4/SYSCFG'), ('STM32L4.*:SYS:.*', 'syscfg_l4/SYSCFG'), ('STM32H7.*:SYS:.*', 'syscfg_h7/SYSCFG'),