pwr/l0: cleanup enums

data/registers/pwr_l0.yaml

@@ -17,7 +17,7 @@ fieldset/CR:
       description: Low-power deepsleep/Sleep/Low-power run
       bit_offset: 0
       bit_size: 1
-      enum: LPSDSR
+      enum: MODE
     - name: PDDS
       description: Power down deepsleep
       bit_offset: 1
@@ -66,12 +66,12 @@ fieldset/CR:
       description: Low power run mode
       bit_offset: 14
       bit_size: 1
-      enum: LPRUN
+      enum: MODE
     - name: LPDS
       description: Regulator in Low-power deepsleep mode
       bit_offset: 16
       bit_size: 1
-      enum: LPDS
+      enum: MODE
 fieldset/CSR:
   description: power control/status register
   fields:
@@ -126,32 +126,14 @@ enum/DS_EE_KOFF:
     - name: NVMSleep
       description: NVM not woken up when exiting from low-power mode (if the bit RUN_PD is set)
       value: 1
-enum/LPDS:
+enum/MODE:
   bit_size: 1
   variants:
     - name: MAIN_MODE
-      description: Voltage regulator in Main mode during Deepsleep mode (Stop mode)
+      description: Voltage regulator in Main mode
       value: 0
     - name: LOW_POWER_MODE
-      description: Voltage regulator switches to low-power mode when the CPU enters Deepsleep mode (Stop mode)
-      value: 1
-enum/LPRUN:
-  bit_size: 1
-  variants:
-    - name: MAIN_MODE
-      description: Voltage regulator in Main mode in Low-power run mode
-      value: 0
-    - name: LOW_POWER_MODE
-      description: Voltage regulator in low-power mode in Low-power run mode
-      value: 1
-enum/LPSDSR:
-  bit_size: 1
-  variants:
-    - name: MAIN_MODE
-      description: Voltage regulator on during Deepsleep/Sleep/Low-power run mode
-      value: 0
-    - name: LOW_POWER_MODE
-      description: Voltage regulator in low-power mode during Deepsleep/Sleep/Low-power run mode
+      description: Voltage regulator switches to low-power mode
       value: 1
 enum/PDDS:
   bit_size: 1