tailoring from tim2chcmp to tim2ch
This commit is contained in:
eZio Pan
parent
dd1d4c772b
commit
1e35b09edf
@ -60,10 +60,6 @@ block/TIM:
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description: auto-reload register (Dither mode enabled)
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byte_offset: 44
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fieldset: ARR_DITHER
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- name: RCR
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description: repetition counter register
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byte_offset: 48
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fieldset: RCR
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- name: CCR
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description: capture/compare register x (x=1-2) (Dither mode disabled)
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array:
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@ -78,68 +74,10 @@ block/TIM:
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stride: 4
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byte_offset: 52
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fieldset: CCR_DITHER
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- name: BDTR
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description: break and dead-time register
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byte_offset: 68
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fieldset: BDTR
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- name: DTR2
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description: break and dead-time register
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byte_offset: 84
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fieldset: DTR2
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- name: TISEL
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description: input selection register
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byte_offset: 92
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fieldset: TISEL
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- name: AF1
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description: alternate function register 1
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byte_offset: 96
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fieldset: AF1
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- name: AF2
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description: alternate function register 2
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byte_offset: 100
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fieldset: AF2
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- name: DCR
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description: DMA control register
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byte_offset: 988
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fieldset: DCR
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- name: DMAR
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description: DMA address for full transfer
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byte_offset: 992
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fieldset: DMAR
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fieldset/AF1:
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description: alternate function register 1
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fields:
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- name: BKINE
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description: TIMx_BKIN input enable
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bit_offset: 0
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bit_size: 1
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- name: BKCMPE
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description: TIM_BRK_CMPx (x=1-8) enable
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bit_offset: 1
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bit_size: 1
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array:
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len: 8
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stride: 1
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- name: BKINP
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description: TIMx_BKIN input polarity
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bit_offset: 9
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bit_size: 1
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enum: BKINP
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- name: BKCMPP
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description: TIM_BRK_CMPx (x=1-4) input polarity
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bit_offset: 10
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bit_size: 1
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array:
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len: 4
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stride: 1
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enum: BKINP
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fieldset/AF2:
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description: alternate function register 2
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fields:
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- name: OCRSEL
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description: ocref_clr source selection
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bit_offset: 16
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bit_size: 3
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fieldset/ARR:
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description: auto-reload register (Dither mode disabled)
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fields:
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@ -158,75 +96,6 @@ fieldset/ARR_DITHER:
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description: Auto-reload value
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bit_offset: 4
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bit_size: 16
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fieldset/BDTR:
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description: break and dead-time register
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fields:
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- name: DTG
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description: Dead-time generator setup
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bit_offset: 0
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bit_size: 8
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- name: LOCK
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description: Lock configuration
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bit_offset: 8
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bit_size: 2
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enum: LOCK
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- name: OSSI
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description: Off-state selection for Idle mode
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bit_offset: 10
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bit_size: 1
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enum: OSSI
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- name: OSSR
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description: Off-state selection for Run mode
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bit_offset: 11
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bit_size: 1
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enum: OSSR
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- name: BKE
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description: Break x (x=1) enable
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bit_offset: 12
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bit_size: 1
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array:
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len: 1
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stride: 12
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- name: BKP
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description: Break x (x=1) polarity
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bit_offset: 13
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bit_size: 1
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array:
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len: 1
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stride: 12
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enum: BKP
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- name: AOE
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description: Automatic output enable
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bit_offset: 14
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bit_size: 1
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- name: MOE
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description: Main output enable
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bit_offset: 15
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bit_size: 1
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- name: BKF
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description: Break x (x=1) filter
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bit_offset: 16
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bit_size: 4
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array:
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len: 1
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stride: 4
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enum: FilterValue
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- name: BKDSRM
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description: Break x (x=1) Disarm
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bit_offset: 26
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bit_size: 1
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array:
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len: 1
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stride: 1
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enum: BKDSRM
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- name: BKBID
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description: Break x (x=1) bidirectional
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bit_offset: 28
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bit_size: 1
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array:
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len: 1
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stride: 1
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enum: BKBID
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fieldset/CCER:
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description: capture/compare enable register
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fields:
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@ -244,13 +113,6 @@ fieldset/CCER:
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array:
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len: 2
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stride: 4
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- name: CCNE
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description: Capture/Compare x (x=1) complementary output enable
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bit_offset: 2
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bit_size: 1
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array:
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len: 1
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stride: 4
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- name: CCNP
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description: Capture/Compare x (x=1-2) output Polarity
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bit_offset: 3
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@ -317,13 +179,6 @@ fieldset/CCMR_Output:
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len: 2
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stride: 8
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enum: OCM
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- name: OCCE
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description: Output compare y clear enable
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bit_offset: 7
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bit_size: 1
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array:
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len: 2
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stride: 8
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fieldset/CCR:
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description: capture/compare register x (x=1,2) (Dither mode disabled)
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fields:
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@ -393,19 +248,6 @@ fieldset/CR1:
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fieldset/CR2:
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description: control register 2
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fields:
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- name: CCPC
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description: Capture/compare preloaded control
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bit_offset: 0
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bit_size: 1
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- name: CCUS
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description: Capture/compare control update selection
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bit_offset: 2
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bit_size: 1
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- name: CCDS
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description: Capture/compare DMA selection
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bit_offset: 3
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bit_size: 1
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enum: CCDS
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- name: MMS
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description: Master mode selection
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bit_offset: 4
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@ -416,36 +258,6 @@ fieldset/CR2:
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bit_offset: 7
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bit_size: 1
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enum: TI1S
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- name: OIS
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description: Output Idle state x (x=1,2)
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bit_offset: 8
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bit_size: 1
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array:
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len: 2
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stride: 2
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- name: OISN
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description: Output Idle state x (x=1)
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bit_offset: 9
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bit_size: 1
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array:
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len: 1
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stride: 2
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fieldset/DCR:
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description: DMA control register
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fields:
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- name: DBA
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description: DMA base address
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bit_offset: 0
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bit_size: 5
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- name: DBL
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description: DMA burst length
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bit_offset: 8
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bit_size: 5
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- name: DBSS
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description: DMA burst source selection
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bit_offset: 16
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bit_size: 4
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enum: DBSS
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fieldset/DIER:
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description: DMA/Interrupt enable register
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fields:
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@ -460,60 +272,10 @@ fieldset/DIER:
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array:
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len: 2
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stride: 1
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- name: COMIE
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description: COM interrupt enable
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bit_offset: 5
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bit_size: 1
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- name: TIE
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description: Trigger interrupt enable
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bit_offset: 6
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bit_size: 1
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- name: BIE
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description: Break interrupt enable
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bit_offset: 7
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bit_size: 1
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- name: UDE
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description: Update DMA request enable
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bit_offset: 8
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bit_size: 1
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- name: CCDE
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description: Capture/Compare x (x=1) DMA request enable
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bit_offset: 9
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bit_size: 1
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array:
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len: 1
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stride: 1
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- name: COMDE
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description: COM DMA request enable
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bit_offset: 13
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bit_size: 1
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- name: TDE
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description: Trigger DMA request enable
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bit_offset: 14
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bit_size: 1
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fieldset/DMAR:
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description: DMA address for full transfer
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fields:
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- name: DMAB
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description: DMA register for burst accesses
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bit_offset: 0
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bit_size: 32
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fieldset/DTR2:
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description: deadtime register 2
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fields:
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- name: DTGF
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description: Dead-time falling edge generator setup
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bit_offset: 0
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bit_size: 8
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- name: DTAE
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description: Deadtime asymmetric enable
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bit_offset: 16
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bit_size: 1
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enum: DTAE
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- name: DTPE
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description: Deadtime preload enable
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bit_offset: 17
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bit_size: 1
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fieldset/EGR:
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description: event generation register
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fields:
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@ -528,21 +290,10 @@ fieldset/EGR:
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array:
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len: 2
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stride: 1
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- name: COMG
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description: Capture/Compare control update generation
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bit_offset: 5
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bit_size: 1
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- name: TG
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description: Trigger generation
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bit_offset: 6
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bit_size: 1
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- name: BG
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description: Break x (x=1) generation
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bit_offset: 7
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bit_size: 1
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array:
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len: 1
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stride: 1
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fieldset/PSC:
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description: prescaler
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fields:
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@ -550,13 +301,6 @@ fieldset/PSC:
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description: Prescaler value
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bit_offset: 0
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bit_size: 16
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fieldset/RCR:
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description: repetition counter register
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fields:
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- name: REP
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description: Repetition counter value
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bit_offset: 0
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bit_size: 8
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fieldset/SMCR:
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description: slave mode control register
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fields:
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@ -575,10 +319,6 @@ fieldset/SMCR:
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bit_offset: 7
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bit_size: 1
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enum: MSM
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- name: SMSPE
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description: SMS preload enable
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bit_offset: 24
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bit_size: 1
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fieldset/SR:
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description: status register
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fields:
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@ -593,21 +333,10 @@ fieldset/SR:
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array:
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len: 2
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stride: 1
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- name: COMIF
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description: COM interrupt flag
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bit_offset: 5
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bit_size: 1
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- name: TIF
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description: Trigger interrupt flag
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bit_offset: 6
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bit_size: 1
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- name: BIF
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description: Break x (x=1) interrupt flag
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bit_offset: 7
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bit_size: 1
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array:
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len: 1
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stride: 1
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- name: CCOF
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description: Capture/Compare x (x=1-2) overcapture flag
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bit_offset: 9
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@ -625,51 +354,6 @@ fieldset/TISEL:
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array:
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len: 2
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stride: 8
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enum/BKBID:
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bit_size: 1
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variants:
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- name: Input
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description: Break input tim_brk in input mode
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value: 0
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- name: Bidirectional
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description: Break input tim_brk in bidirectional mode
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value: 1
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enum/BKDSRM:
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bit_size: 1
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variants:
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- name: Armed
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description: Break input tim_brk is armed
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value: 0
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- name: Disarmed
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description: Break input tim_brk is disarmed
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value: 1
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enum/BKINP:
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bit_size: 1
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variants:
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- name: NotInverted
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description: input polarity is not inverted (active low if BKxP = 0, active high if BKxP = 1)
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value: 0
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- name: Inverted
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description: input polarity is inverted (active high if BKxP = 0, active low if BKxP = 1)
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value: 1
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enum/BKP:
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bit_size: 1
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variants:
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- name: ActiveLow
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description: Break input tim_brk is active low
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value: 0
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- name: ActiveHigh
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description: Break input tim_brk is active high
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value: 1
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enum/CCDS:
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bit_size: 1
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variants:
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- name: OnCompare
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description: CCx DMA request sent when CCx event occurs
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value: 0
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- name: OnUpdate
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description: CCx DMA request sent when update event occurs
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value: 1
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enum/CCMR_Input_CCS:
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bit_size: 2
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variants:
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@ -700,39 +384,6 @@ enum/CKD:
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- name: Div4
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description: t_DTS = 4 × t_CK_INT
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value: 2
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enum/DBSS:
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bit_size: 4
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variants:
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- name: Update
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description: Update
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value: 1
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- name: CC1
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description: CC1
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value: 2
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- name: CC2
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description: CC2
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value: 3
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- name: CC3
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description: CC3
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value: 4
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- name: CC4
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description: CC4
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value: 5
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- name: COM
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description: COM
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value: 6
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- name: Trigger
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description: Trigger
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value: 7
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enum/DTAE:
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bit_size: 1
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variants:
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- name: Identical
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description: Deadtime on rising and falling edges are identical, and defined with DTG[7:0] register
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value: 0
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- name: Distinct
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description: Deadtime on rising edge is defined with DTG[7:0] register and deadtime on falling edge is defined with DTGF[7:0] bits.
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value: 1
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enum/FilterValue:
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bit_size: 4
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variants:
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@ -784,21 +435,6 @@ enum/FilterValue:
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- name: FDTS_Div32_N8
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description: fSAMPLING=fDTS/32, N=8
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value: 15
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enum/LOCK:
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bit_size: 2
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variants:
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- name: Disabled
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description: No bit is write protected
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value: 0
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- name: Level1
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description: DTG bits in TIMx_BDTR register, OISx and OISxN bits in TIMx_CR2 register and BKBID/BKE/BKP/AOE bits in TIMx_BDTR register can no longer be written
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value: 1
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- name: Level2
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description: LOCK Level 1 + CC Polarity bits (CCxP/CCxNP bits in TIMx_CCER register, as long as the related channel is configured in output through the CCxS bits) as well as OSSR and OSSI bits can no longer be written.
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value: 2
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- name: Level3
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description: LOCK Level 2 + CC Control bits (OCxM and OCxPE bits in TIMx_CCMRx registers, as long as the related channel is configured in output through the CCxS bits) can no longer be written.
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value: 3
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enum/MMS:
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bit_size: 3
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variants:
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@ -862,24 +498,6 @@ enum/OCM:
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- name: PwmMode2
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description: Inversely to PwmMode1
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value: 7
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enum/OSSI:
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bit_size: 1
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variants:
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- name: Disabled
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description: When inactive, OC/OCN outputs are disabled
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value: 0
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- name: IdleLevel
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description: When inactive, OC/OCN outputs are forced to idle level
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value: 1
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enum/OSSR:
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bit_size: 1
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variants:
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- name: Disabled
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description: When inactive, OC/OCN outputs are disabled
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value: 0
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- name: IdleLevel
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description: When inactive, OC/OCN outputs are enabled with their inactive level
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value: 1
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enum/SMS:
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bit_size: 3
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variants:
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