diff --git a/data/registers/pwr_g0.yaml b/data/registers/pwr_g0.yaml
index 669a3a3..ad52698 100644
--- a/data/registers/pwr_g0.yaml
+++ b/data/registers/pwr_g0.yaml
@@ -96,26 +96,13 @@ fieldset/CR2:
 fieldset/CR3:
   description: Power control register 3
   fields:
-    - name: EWUP1
-      description: Enable Wakeup pin WKUP1
+    - name: EWUP
+      description: Enable Wakeup pin
       bit_offset: 0
       bit_size: 1
-    - name: EWUP2
-      description: Enable Wakeup pin WKUP2
-      bit_offset: 1
-      bit_size: 1
-    - name: EWUP4
-      description: Enable Wakeup pin WKUP4
-      bit_offset: 3
-      bit_size: 1
-    - name: EWUP5
-      description: Enable WKUP5 wakeup pin
-      bit_offset: 4
-      bit_size: 1
-    - name: EWUP6
-      description: Enable WKUP6 wakeup pin
-      bit_offset: 5
-      bit_size: 1
+      array:
+        len: 6
+        stride: 1
     - name: RRS
       description: SRAM retention in Standby mode
       bit_offset: 8
@@ -135,26 +122,13 @@ fieldset/CR3:
 fieldset/CR4:
   description: Power control register 4
   fields:
-    - name: WP1
+    - name: WP
       description: Wakeup pin WKUP1 polarity
       bit_offset: 0
       bit_size: 1
-    - name: WP2
-      description: Wakeup pin WKUP2 polarity
-      bit_offset: 1
-      bit_size: 1
-    - name: WP4
-      description: Wakeup pin WKUP4 polarity
-      bit_offset: 3
-      bit_size: 1
-    - name: WP5
-      description: Wakeup pin WKUP5 polarity
-      bit_offset: 4
-      bit_size: 1
-    - name: WP6
-      description: WKUP6 wakeup pin polarity
-      bit_offset: 5
-      bit_size: 1
+      array:
+        len: 6
+        stride: 1
     - name: VBE
       description: VBAT battery charging enable
       bit_offset: 8
@@ -176,26 +150,13 @@ fieldset/PCR:
 fieldset/SCR:
   description: Power status clear register
   fields:
-    - name: CWUF1
-      description: Clear wakeup flag 1
+    - name: CWUF
+      description: Clear Wakeup flag
       bit_offset: 0
       bit_size: 1
-    - name: CWUF2
-      description: Clear wakeup flag 2
-      bit_offset: 1
-      bit_size: 1
-    - name: CWUF4
-      description: Clear wakeup flag 4
-      bit_offset: 3
-      bit_size: 1
-    - name: CWUF5
-      description: Clear wakeup flag 5
-      bit_offset: 4
-      bit_size: 1
-    - name: CWUF6
-      description: Clear wakeup flag 6
-      bit_offset: 5
-      bit_size: 1
+      array:
+        len: 6
+        stride: 1
     - name: CSBF
       description: Clear standby flag
       bit_offset: 8
@@ -203,26 +164,13 @@ fieldset/SCR:
 fieldset/SR1:
   description: Power status register 1
   fields:
-    - name: WUF1
-      description: Wakeup flag 1
+    - name: WUF
+      description: Wakeup flag
       bit_offset: 0
       bit_size: 1
-    - name: WUF2
-      description: Wakeup flag 2
-      bit_offset: 1
-      bit_size: 1
-    - name: WUF4
-      description: Wakeup flag 4
-      bit_offset: 3
-      bit_size: 1
-    - name: WUF5
-      description: Wakeup flag 5
-      bit_offset: 4
-      bit_size: 1
-    - name: WUF6
-      description: Wakeup flag 6
-      bit_offset: 5
-      bit_size: 1
+      array:
+        len: 6
+        stride: 1
     - name: SBF
       description: Standby flag
       bit_offset: 8
diff --git a/data/registers/rcc_g0.yaml b/data/registers/rcc_g0.yaml
index c448596..95a1a46 100644
--- a/data/registers/rcc_g0.yaml
+++ b/data/registers/rcc_g0.yaml
@@ -826,7 +826,7 @@ fieldset/CFGR:
       description: System clock switch status
       bit_offset: 3
       bit_size: 3
-      enum: SWS
+      enum: SW
     - name: HPRE
       description: AHB prescaler
       bit_offset: 8
@@ -841,12 +841,12 @@ fieldset/CFGR:
       description: MCO2SEL
       bit_offset: 16
       bit_size: 4
-      enum: MCO2SEL
+      enum: MCOSEL
     - name: MCO2PRE
       description: MCO2PRE
       bit_offset: 20
       bit_size: 4
-      enum: MCO2PRE
+      enum: MCOPRE
     - name: MCOSEL
       description: Microcontroller clock output
       bit_offset: 24
@@ -1394,81 +1394,6 @@ enum/LSEDRV:
     - name: High
       description: High driving capability
       value: 3
-enum/MCO2PRE:
-  bit_size: 4
-  variants:
-    - name: Div1
-      description: MCO2 not divided
-      value: 0
-    - name: Div2
-      description: MCO2 clock is divided by 2
-      value: 1
-    - name: Div4
-      description: MCO2 clock is divided by 4
-      value: 2
-    - name: Div8
-      description: MCO2 clock is divided by 8
-      value: 3
-    - name: Div16
-      description: MCO2 clock is divided divided by 16
-      value: 4
-    - name: Div32
-      description: MCO2 clock is divided divided by 32
-      value: 5
-    - name: Div64
-      description: MCO2 clock is divided divided by 64
-      value: 6
-    - name: Div128
-      description: MCO2 clock is divided divided by 128
-      value: 7
-    - name: Div256
-      description: MCO2 clock is divided divided by 256
-      value: 8
-    - name: Div512
-      description: MCO2 clock is divided divided by 512
-      value: 9
-    - name: Div1024
-      description: MCO2 clock is divided divided by 1024
-      value: 10
-enum/MCO2SEL:
-  bit_size: 4
-  variants:
-    - name: NoClock
-      description: "No clock, MCO2 output disabled"
-      value: 0
-    - name: SYSCLK
-      description: SYSCLK selected as MCO2 source
-      value: 1
-    - name: HSI48
-      description: HSI48 selected as MCO2 source
-      value: 2
-    - name: HSI16
-      description: HSI16 selected as MCO2 source
-      value: 3
-    - name: HSE
-      description: HSE selected as MCO2 source
-      value: 4
-    - name: PLLRCLK
-      description: PLLRCLK selected as MCO2 source
-      value: 5
-    - name: LSI
-      description: LSI selected as MCO2 source
-      value: 6
-    - name: LSE
-      description: LSE selected as MCO2 source
-      value: 7
-    - name: PLLPCLK
-      description: PLLPCLK selected as MCO2 source
-      value: 8
-    - name: PLLQCLK
-      description: PLLQCLK selected as MCO2 source
-      value: 9
-    - name: RTCCLK
-      description: RTCCLK selected as MCO2 source
-      value: 10
-    - name: RTC_WKUP
-      description: RTC_Wakeup selected as MCO2 source
-      value: 11
 enum/MCOPRE:
   bit_size: 4
   variants:
@@ -1476,34 +1401,34 @@ enum/MCOPRE:
       description: MCO1 not divided
       value: 0
     - name: Div2
-      description: MCO1 clock is divided by 2
+      description: MCO clock is divided by 2
       value: 1
     - name: Div4
-      description: MCO1 clock is divided by 4
+      description: MCO clock is divided by 4
       value: 2
     - name: Div8
-      description: MCO1 clock is divided by 8
+      description: MCO clock is divided by 8
       value: 3
     - name: Div16
-      description: MCO1 clock is divided divided by 16
+      description: MCO clock is divided divided by 16
       value: 4
     - name: Div32
-      description: MCO1 clock is divided divided by 32
+      description: MCO clock is divided divided by 32
       value: 5
     - name: Div64
-      description: MCO1 clock is divided divided by 64
+      description: MCO clock is divided divided by 64
       value: 6
     - name: Div128
-      description: MCO1 clock is divided divided by 128
+      description: MCO clock is divided divided by 128
       value: 7
     - name: Div256
-      description: MCO1 clock is divided divided by 256
+      description: MCO clock is divided divided by 256
       value: 8
     - name: Div512
-      description: MCO1 clock is divided divided by 512
+      description: MCO clock is divided divided by 512
       value: 9
     - name: Div1024
-      description: MCO1 clock is divided divided by 1024
+      description: MCO clock is divided divided by 1024
       value: 10
 enum/MCOSEL:
   bit_size: 4
@@ -1512,37 +1437,37 @@ enum/MCOSEL:
       description: "No clock, MCO output disabled"
       value: 0
     - name: SYSCLK
-      description: SYSCLK selected as MCO1 source
+      description: SYSCLK selected as MCO source
       value: 1
     - name: HSI48
-      description: HSI48 selected as MCO1 source
+      description: HSI48 selected as MCO source
       value: 2
     - name: HSI16
-      description: HSI16 selected as MCO1 source
+      description: HSI16 selected as MCO source
       value: 3
     - name: HSE
-      description: HSE selected as MCO1 source
+      description: HSE selected as MCO source
       value: 4
     - name: PLLRCLK
-      description: PLLRCLK selected as MCO1 source
+      description: PLLRCLK selected as MCO source
       value: 5
     - name: LSI
-      description: LSI selected as MCO1 source
+      description: LSI selected as MCO source
       value: 6
     - name: LSE
-      description: LSE selected as MCO1 source
+      description: LSE selected as MCO source
       value: 7
     - name: PLLPCLK
-      description: PLLPCLK selected as MCO1 source
+      description: PLLPCLK selected as MCO source
       value: 8
     - name: PLLQCLK
-      description: PLLQCLK selected as MCO1 source
+      description: PLLQCLK selected as MCO source
       value: 9
     - name: RTCCLK
-      description: RTCCLK selected as MCO1 source
+      description: RTCCLK selected as MCO source
       value: 10
     - name: RTC_WKUP
-      description: RTC_Wakeup selected as MCO1 source
+      description: RTC_Wakeup selected as MCO source
       value: 11
 enum/PLLSRC:
   bit_size: 2
@@ -1637,24 +1562,6 @@ enum/SW:
     - name: LSE
       description: LSE selected as system clock
       value: 4
-enum/SWS:
-  bit_size: 3
-  variants:
-    - name: HSI
-      description: HSI used as system clock
-      value: 0
-    - name: HSE
-      description: HSE used as system clock
-      value: 1
-    - name: PLLRCLK
-      description: PLLRCLK used as system clock
-      value: 2
-    - name: LSI
-      description: LSI used as system clock
-      value: 3
-    - name: LSE
-      description: LSE used as system clock
-      value: 4
 enum/TIM15SEL:
   bit_size: 1
   variants:
diff --git a/data/registers/syscfg_g0.yaml b/data/registers/syscfg_g0.yaml
index f67ddea..11e11d2 100644
--- a/data/registers/syscfg_g0.yaml
+++ b/data/registers/syscfg_g0.yaml
@@ -3,11 +3,11 @@ block/SYSCFG:
   description: System configuration controller
   items:
     - name: CFGR1
-      description: SYSCFG configuration register 1
+      description: configuration register 1
       byte_offset: 0
       fieldset: CFGR1
     - name: CFGR2
-      description: SYSCFG configuration register 1
+      description: configuration register 1
       byte_offset: 24
       fieldset: CFGR2
     - name: VREFBUF_CSR
@@ -179,12 +179,13 @@ block/SYSCFG:
       access: Read
       fieldset: ITLINE31
 fieldset/CFGR1:
-  description: SYSCFG configuration register 1
+  description: configuration register 1
   fields:
     - name: MEM_MODE
       description: Memory mapping selection bits
       bit_offset: 0
       bit_size: 2
+      enum: MEM_MODE
     - name: PA11_PA12_RMP
       description: PA11 and PA12 remapping bit.
       bit_offset: 4
@@ -226,7 +227,7 @@ fieldset/CFGR1:
       bit_offset: 22
       bit_size: 2
 fieldset/CFGR2:
-  description: SYSCFG configuration register 1
+  description: configuration register 1
   fields:
     - name: LOCKUP_LOCK
       description: Cortex-M0+ LOCKUP bit enable bit
@@ -584,7 +585,7 @@ fieldset/ITLINE5:
   description: interrupt line 5 status register
   fields:
     - name: EXTI
-      description: EXTI0
+      description: EXTI
       bit_offset: 0
       bit_size: 1
       array:
@@ -594,7 +595,7 @@ fieldset/ITLINE6:
   description: interrupt line 6 status register
   fields:
     - name: EXTI
-      description: EXTI2
+      description: EXTI
       bit_offset: 0
       bit_size: 1
       array:
@@ -604,7 +605,7 @@ fieldset/ITLINE7:
   description: interrupt line 7 status register
   fields:
     - name: EXTI
-      description: EXTI4
+      description: EXTI
       bit_offset: 0
       bit_size: 1
       array:
@@ -653,3 +654,12 @@ fieldset/VREFBUF_CSR:
       description: "Voltage reference scale These bits select the value generated by the voltage reference buffer. Other: Reserved"
       bit_offset: 4
       bit_size: 3
+enum/MEM_MODE:
+  bit_size: 2
+  variants:
+    - name: FLASH
+      description: System Flash memory
+      value: 1
+    - name: SRAM
+      description: Embedded SRAM
+      value: 3