diff --git a/data/registers/timadv_v2.yaml b/data/registers/timadv_v2.yaml
index 56928f9..624d373 100644
--- a/data/registers/timadv_v2.yaml
+++ b/data/registers/timadv_v2.yaml
@@ -79,10 +79,10 @@ block/TIM:
     description: capture/compare register 6
     byte_offset: 76
     fieldset: CCR
-  - name: CCMR3_Output
-    description: capture/compare mode register 3 (output mode only)
+  - name: CCMR3
+    description: capture/compare mode register 3
     byte_offset: 80
-    fieldset: CCMR_Output
+    fieldset: CCMR3
   - name: DTR2
     description: break and dead-time register
     byte_offset: 84
@@ -111,3 +111,694 @@ block/TIM:
     description: DMA address for full transfer
     byte_offset: 992
     fieldset: DMAR
+fieldset/AF1:
+  description: alternate function register 1
+  fields:
+  - name: BKINE
+    description: TIMx_BKIN input enable
+    bit_offset: 0
+    bit_size: 1
+  - name: BKCMPE
+    description: TIM_BRK_CMPx (x=1-8) enable
+    bit_offset: 1
+    bit_size: 1
+    array:
+      len: 1
+      stride: 8
+  - name: BKINP
+    description: TIMx_BKIN input polarity
+    bit_offset: 9
+    bit_size: 1
+    enum: BKINP
+  - name: BKCMPP
+    description: TIM_BRK_CMPx (x=1-4) input polarity
+    bit_offset: 10
+    bit_size: 1
+    array:
+      len: 1
+      stride: 4
+    enum: BKINP
+  - name: ETRSEL
+    description: etr_in source selection
+    bit_offset: 14
+    bit_size: 4
+fieldset/AF2:
+  description: alternate function register 2
+  fields:
+  - name: BK2INE
+    description: TIMx_BKIN2 input enable
+    bit_offset: 0
+    bit_size: 1
+  - name: BK2CMPE
+    description: TIM_BRK2_CMPx (x=1-8) enable
+    bit_offset: 1
+    bit_size: 1
+    array:
+      len: 1
+      stride: 8
+  - name: BK2INP
+    description: TIMx_BK2IN input polarity
+    bit_offset: 9
+    bit_size: 1
+    enum: BKINP
+  - name: BK2CMPP
+    description: TIM_BRK2_CMPx (x=1-4) input polarity
+    bit_offset: 10
+    bit_size: 1
+    array:
+      len: 1
+      stride: 4
+    enum: BKxINP
+  - name: OCRSEL
+    description: ocref_clr source selection
+    bit_offset: 16
+    bit_size: 3
+fieldset/ARR:
+  description: auto-reload register
+  fields:
+  - name: ARR
+    description: Auto-reload value (Dither mode disabled)
+    bit_offset: 0
+    bit_size: 16
+  - name: ARR_DITHER
+    description: Auto-reload value (Dither mode enabled)
+    bit_offset: 0
+    bit_size: 20
+fieldset/BDTR:
+  description: break and dead-time register
+  fields:
+  - name: DTG
+    description: Dead-time generator setup
+    bit_offset: 0
+    bit_size: 8
+  - name: LOCK
+    description: Lock configuration
+    bit_offset: 8
+    bit_size: 2
+    enum: LOCK
+  - name: OSSI
+    description: Off-state selection for Idle mode
+    bit_offset: 10
+    bit_size: 1
+    enum: OSSI
+  - name: OSSR
+    description: Off-state selection for Run mode
+    bit_offset: 11
+    bit_size: 1
+    enum: OSSR
+  - name: BKE
+    description: Break x (x=1,2) enable
+    bit_offset: 12
+    bit_size: 1
+    array:
+      len: 2
+      stride: 12
+  - name: BKP
+    description: Break x (x=1,2) polarity
+    bit_offset: 13
+    bit_size: 1
+    array:
+      len: 2
+      stride: 12
+    enum: BKP
+  - name: AOE
+    description: Automatic output enable
+    bit_offset: 14
+    bit_size: 1
+  - name: MOE
+    description: Main output enable
+    bit_offset: 15
+    bit_size: 1
+  - name: BKF
+    description: Break x (x=1,2) filter
+    bit_offset: 16
+    bit_size: 4
+    array:
+      len: 2
+      stride: 4
+    enum: FilterValue
+  - name: BKDSRM
+    description: Break Disarm
+    bit_offset: 26
+    bit_size: 1
+    array:
+      len: 2
+      stride: 1
+    enum: BKDSRM
+  - name: BKBID
+    description: Break bidirectional
+    bit_offset: 28
+    bit_size: 1
+    array:
+      len: 2
+      stride: 1
+    enum: BKBID
+fieldset/CCER:
+  description: capture/compare enable register
+  fields:
+  - name: CCE
+    description: Capture/Compare x (x=1-6) output enable
+    bit_offset: 0
+    bit_size: 1
+    array:
+      len: 6
+      stride: 4
+  - name: CCP
+    description: Capture/Compare x (x=1-6) output Polarity
+    bit_offset: 1
+    bit_size: 1
+    array:
+      len: 6
+      stride: 4
+  - name: CCNE
+    description: Capture/Compare x (x=1-4) complementary output enable
+    bit_offset: 2
+    bit_size: 1
+    array:
+      len: 4
+      stride: 4
+  - name: CCNP
+    description: Capture/Compare x (x=1-4) output Polarity
+    bit_offset: 3
+    bit_size: 1
+    array:
+      len: 4
+      stride: 4
+fieldset/CCMR3:
+  description: capture/compare mode register 3
+  fields:
+  - name: OCFE
+    description: Output compare x (x=5,6) fast enable
+    bit_offset: 2
+    bit_size: 1
+    array:
+      len: 2
+      stride: 8
+  - name: OCPE
+    description: Output compare x (x=5,6) preload enable
+    bit_offset: 3
+    bit_size: 1
+    array:
+      len: 2
+      stride: 8
+  - name: OCM
+    description: Output compare x (x=5,6) mode
+    bit_offset: 4
+    bit_size: 3
+    array:
+      len: 2
+      stride: 8
+    enum: OCM
+  - name: OCCE
+    description: Output compare x (x=5,6) clear enable
+    bit_offset: 7
+    bit_size: 1
+    array:
+      len: 2
+      stride: 8
+fieldset/CCMR_Input:
+  description: capture/compare mode register x (x=1-2) (input mode)
+  fields:
+  - name: CCS
+    description: Capture/Compare y selection
+    bit_offset: 0
+    bit_size: 2
+    array:
+      len: 2
+      stride: 8
+    enum: CCMR_Input_CCS
+  - name: ICPSC
+    description: Input capture y prescaler
+    bit_offset: 2
+    bit_size: 2
+    array:
+      len: 2
+      stride: 8
+  - name: ICF
+    description: Input capture y filter
+    bit_offset: 4
+    bit_size: 4
+    array:
+      len: 2
+      stride: 8
+    enum: FilterValue
+fieldset/CCMR_Output:
+  description: capture/compare mode register x (x=1-3) (output mode)
+  fields:
+  - name: CCS
+    description: Capture/Compare y selection
+    bit_offset: 0
+    bit_size: 2
+    array:
+      len: 2
+      stride: 8
+    enum: CCMR_Output_CCS
+  - name: OCFE
+    description: Output compare y fast enable
+    bit_offset: 2
+    bit_size: 1
+    array:
+      len: 2
+      stride: 8
+  - name: OCPE
+    description: Output compare y preload enable
+    bit_offset: 3
+    bit_size: 1
+    array:
+      len: 2
+      stride: 8
+  - name: OCM
+    description: Output compare y mode
+    bit_offset: 4
+    bit_size: 3
+    array:
+      len: 2
+      stride: 8
+    enum: OCM
+  - name: OCCE
+    description: Output compare y clear enable
+    bit_offset: 7
+    bit_size: 1
+    array:
+      len: 2
+      stride: 8
+fieldset/CCR:
+  description: capture/compare register x (x=1-4,6)
+  fields:
+  - name: CCR
+    description: Capture/Compare x (x=1-4,6) value (Dither mode disabled)
+    bit_offset: 0
+    bit_size: 16
+  - name: CCR_DITHER
+    description: Capture/Compare x (x=1-4,6) value (Dither mode enabled)
+    bit_offset: 0
+    bit_size: 20
+fieldset/CCR5:
+  extends: CCR
+  description: capture/compare register 5
+  fields:
+  - name: GC5C
+    description: Group channel 5 and channel x (x=1-3)
+    bit_offset: 29
+    bit_size: 1
+    array:
+      len: 3
+      stride: 1
+    enum: GC5C
+fieldset/CNT:
+  description: counter
+  fields:
+  - name: CNT
+    description: counter value
+    bit_offset: 0
+    bit_size: 16
+  - name: UIFCPY
+    description: UIF copy
+    bit_offset: 31
+    bit_size: 1
+fieldset/CR1:
+  description: control register 1
+  fields:
+  - name: CEN
+    description: Counter enable
+    bit_offset: 0
+    bit_size: 1
+  - name: UDIS
+    description: Update disable
+    bit_offset: 1
+    bit_size: 1
+  - name: URS
+    description: Update request source
+    bit_offset: 2
+    bit_size: 1
+    enum: URS
+  - name: OPM
+    description: One-pulse mode enbaled
+    bit_offset: 3
+    bit_size: 1
+  - name: DIR
+    description: Direction
+    bit_offset: 4
+    bit_size: 1
+    enum: DIR
+  - name: CMS
+    description: Center-aligned mode selection
+    bit_offset: 5
+    bit_size: 2
+    enum: CMS
+  - name: ARPE
+    description: Auto-reload preload enable
+    bit_offset: 7
+    bit_size: 1
+  - name: CKD
+    description: Clock division
+    bit_offset: 8
+    bit_size: 2
+    enum: CKD
+  - name: UIFREMAP
+    description: UIF status bit remapping enable
+    bit_offset: 11
+    bit_size: 1
+  - name: DITHEN
+    description: Dithering enable
+    bit_offset: 12
+    bit_size: 1
+fieldset/CR2:
+  description: control register 2
+  fields:
+  - name: CCPC
+    description: Capture/compare preloaded control
+    bit_offset: 0
+    bit_size: 1
+  - name: CCUS
+    description: Capture/compare control update selection
+    bit_offset: 2
+    bit_size: 1
+  - name: CCDS
+    description: Capture/compare DMA selection
+    bit_offset: 3
+    bit_size: 1
+    enum: CCDS
+  - name: MMS
+    description: Master mode selection
+    bit_offset: 4
+    bit_size: 3
+    enum: MMS
+  - name: TI1S
+    description: TI1 selection
+    bit_offset: 7
+    bit_size: 1
+    enum: TIS
+  - name: OIS
+    description: Output Idle state 1(N)-4(N)
+    bit_offset: 8
+    bit_size: 1
+    array:
+      len: 4
+      stride: 2
+  - name: OIS5
+    description: Output Idle state 5
+    bit_offset: 16
+    bit_size: 1
+  - name: OIS6
+    description: Output Idle state 6
+    bit_offset: 18
+    bit_size: 1
+  - name: MMS2
+    description: Master mode selection 2
+    bit_offset: 20
+    bit_size: 4
+    enum: MMS2
+fieldset/DCR:
+  description: DMA control register
+  fields:
+  - name: DBA
+    description: DMA base address
+    bit_offset: 0
+    bit_size: 5
+  - name: DBL
+    description: DMA burst length
+    bit_offset: 8
+    bit_size: 5
+  - name: DBSS
+    description: DMA burst source selection
+    bit_offset: 16
+    bit_size: 4
+    enum: DBSS
+fieldset/DIER:
+  description: DMA/Interrupt enable register
+  fields:
+  - name: UIE
+    description: Update interrupt enable
+    bit_offset: 0
+    bit_size: 1
+  - name: CCIE
+    description: Capture/Compare 1 interrupt enable
+    bit_offset: 1
+    bit_size: 1
+    array:
+      len: 4
+      stride: 1
+  - name: COMIE
+    description: COM interrupt enable
+    bit_offset: 5
+    bit_size: 1
+  - name: TIE
+    description: Trigger interrupt enable
+    bit_offset: 6
+    bit_size: 1
+  - name: BIE
+    description: Break interrupt enable
+    bit_offset: 7
+    bit_size: 1
+  - name: UDE
+    description: Update DMA request enable
+    bit_offset: 8
+    bit_size: 1
+  - name: CCDE
+    description: Capture/Compare x (x=1-4) DMA request enable
+    bit_offset: 9
+    bit_size: 1
+    array:
+      len: 4
+      stride: 1
+  - name: COMDE
+    description: COM DMA request enable
+    bit_offset: 13
+    bit_size: 1
+  - name: TDE
+    description: Trigger DMA request enable
+    bit_offset: 14
+    bit_size: 1
+  - name: IDXIE
+    description: Index interrupt enable
+    bit_offset: 20
+    bit_size: 1
+  - name: DIRIE
+    description: Direction change interrupt enable
+    bit_offset: 21
+    bit_size: 1
+  - name: IERRIE
+    description: Index error interrupt enable
+    bit_offset: 22
+    bit_size: 1
+  - name: TERRIE
+    description: Transition error interrupt enable
+    bit_offset: 23
+    bit_size: 1
+fieldset/DMAR:
+  description: DMA address for full transfer
+  fields:
+  - name: DMAB
+    description: DMA register for burst accesses
+    bit_offset: 0
+    bit_size: 32
+fieldset/DTR2:
+  description: deadtime register 2
+  fields:
+  - name: DTGF
+    description: Dead-time falling edge generator setup
+    bit_offset: 0
+    bit_size: 8
+  - name: DTAE
+    description: Deadtime asymmetric enable
+    bit_offset: 16
+    bit_size: 1
+    enum: DTAE
+  - name: DTPE
+    description: Deadtime preload enable
+    bit_offset: 17
+    bit_size: 1
+fieldset/ECR:
+  description: encoder control register
+  fields:
+  - name: IE
+    description: Index enable
+    bit_offset: 0
+    bit_size: 1
+  - name: IDIR
+    description: Index direction
+    bit_offset: 1
+    bit_size: 2
+    enum: IDIR
+  - name: FIDX
+    description: First index
+    bit_offset: 5
+    bit_size: 1
+    enum: FIDX
+  - name: IPOS
+    description: Index positioning
+    bit_offset: 6
+    bit_size: 2
+  - name: PW
+    description: Pulse width
+    bit_offset: 16
+    bit_size: 8
+  - name: PWPRSC
+    description: Pulse width prescaler
+    bit_offset: 24
+    bit_size: 2
+fieldset/EGR:
+  description: event generation register
+  fields:
+  - name: UG
+    description: Update generation
+    bit_offset: 0
+    bit_size: 1
+  - name: CCG
+    description: Capture/compare x (x=1-4) generation
+    bit_offset: 1
+    bit_size: 1
+    array:
+      len: 4
+      stride: 1
+  - name: COMG
+    description: Capture/Compare control update generation
+    bit_offset: 5
+    bit_size: 1
+  - name: TG
+    description: Trigger generation
+    bit_offset: 6
+    bit_size: 1
+  - name: BG
+    description: Break x (x=1-2) generation
+    bit_offset: 7
+    bit_size: 1
+    array:
+      len: 2
+      stride: 1
+fieldset/PSC:
+  description: prescaler
+  fields:
+  - name: PSC
+    description: Prescaler value
+    bit_offset: 0
+    bit_size: 16
+fieldset/RCR:
+  description: repetition counter register
+  fields:
+  - name: REP
+    description: Repetition counter value
+    bit_offset: 0
+    bit_size: 16
+fieldset/SMCR:
+  description: slave mode control register
+  fields:
+  - name: SMS
+    description: Slave mode selection
+    bit_offset: 0
+    bit_size: 3
+    enum: SMS
+  - name: OCCS
+    description: a????????
+    bit_offset: 3
+    bit_size: 1
+    enum: SMS
+  - name: TS
+    description: Trigger selection
+    bit_offset: 4
+    bit_size: 3
+    enum: TS
+  - name: MSM
+    description: Master/Slave mode
+    bit_offset: 7
+    bit_size: 1
+    enum: MSM
+  - name: ETF
+    description: External trigger filter
+    bit_offset: 8
+    bit_size: 4
+    enum: ETF
+  - name: ETPS
+    description: External trigger prescaler
+    bit_offset: 12
+    bit_size: 2
+    enum: ETPS
+  - name: ECE
+    description: External clock mode 2 enable
+    bit_offset: 14
+    bit_size: 1
+  - name: ETP
+    description: External trigger polarity
+    bit_offset: 15
+    bit_size: 1
+    enum: ETP
+  - name: SMSPE
+    description: SMS preload enable
+    bit_offset: 24
+    bit_size: 1
+  - name: SMSPS
+    description: SMS preload source
+    bit_offset: 25
+    bit_size: 1
+    enum: SMSPS
+fieldset/SR:
+  description: status register
+  fields:
+  - name: UIF
+    description: Update interrupt flag
+    bit_offset: 0
+    bit_size: 1
+  - name: CCIF
+    description: Capture/compare x (x=1-4) interrupt flag
+    bit_offset: 1
+    bit_size: 1
+    array:
+      len: 4
+      stride: 1
+  - name: COMIF
+    description: COM interrupt flag
+    bit_offset: 5
+    bit_size: 1
+  - name: TIF
+    description: Trigger interrupt flag
+    bit_offset: 6
+    bit_size: 1
+  - name: BIF
+    description: Break x (x=1,2) interrupt flag
+    bit_offset: 7
+    bit_size: 1
+    array:
+      len: 2
+      stride: 1
+  - name: CCOF
+    description: Capture/Compare x (x=1-4) overcapture flag
+    bit_offset: 9
+    bit_size: 1
+    array:
+      len: 4
+      stride: 1
+  - name: CCIF5
+    description: Capture/compare 5 interrupt flag
+    bit_offset: 16
+    bit_size: 1
+  - name: CCIF6
+    description: Capture/compare 6 interrupt flag
+    bit_offset: 16
+    bit_size: 1
+  - name: IDXIF
+    description: Index interrupt flag
+    bit_offset: 20
+    bit_size: 1
+  - name: DIRIF
+    description: Direction change interrupt flag
+    bit_offset: 21
+    bit_size: 1
+  - name: IERRIF
+    description: Index error interrupt flag
+    bit_offset: 22
+    bit_size: 1
+  - name: TERRIF
+    description: Transition error interrupt flag
+    bit_offset: 23
+    bit_size: 1
+fieldset/TISEL:
+  description: input selection register
+  fields:
+  - name: TISEL
+    description: Selects TIM_TIx (x=1-4) input
+    bit_offset: 0
+    bit_size: 4
+    array:
+      len: 4
+      stride: 8