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Merge pull request #389 from msrd0/syscfg_ur18

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Add SYSCFG_UR18 register
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Dario Nieuwenhuis 2024-02-07 18:24:02 +00:00 committed by GitHub
commit 19c010e2e1
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1 changed files with 12 additions and 0 deletions
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data/registers/syscfg_h7.yaml
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@ -112,6 +112,11 @@ block/SYSCFG:
byte_offset: 836 byte_offset: 836
access: Read access: Read
fieldset: UR17 fieldset: UR17
- name: UR18
description: SYSCFG user register 18
byte_offset: 840
access: Read
fieldset: UR18
fieldset/CCCR: fieldset/CCCR:
description: SYSCFG compensation cell code register description: SYSCFG compensation cell code register
fields: fields:
@ -316,6 +321,13 @@ fieldset/UR17:
description: I/O high speed / low voltage description: I/O high speed / low voltage
bit_offset: 0 bit_offset: 0
bit_size: 1 bit_size: 1
fieldset/UR18:
description: SYSCFG user register 18
fields:
- name: CPU_FREQ_BOOST
description: CPU maximum frequency boost enable
bit_offset: 0
bit_size: 1
fieldset/UR2: fieldset/UR2:
description: SYSCFG user register 2 description: SYSCFG user register 2
fields: fields: