From 582969eb56d98ee85dc6dc4f341c0e67fb3de46f Mon Sep 17 00:00:00 2001 From: chemicstry Date: Fri, 3 Jun 2022 10:18:22 +0300 Subject: [PATCH 1/3] Add F1 BKP peripheral --- data/registers/bkp_v1.yaml | 144 +++++++++++++++++++++++++++++++++++++ stm32data/__main__.py | 3 +- 2 files changed, 146 insertions(+), 1 deletion(-) create mode 100644 data/registers/bkp_v1.yaml diff --git a/data/registers/bkp_v1.yaml b/data/registers/bkp_v1.yaml new file mode 100644 index 0000000..2d818d4 --- /dev/null +++ b/data/registers/bkp_v1.yaml @@ -0,0 +1,144 @@ +--- +block/BKP: + description: Backup registers + items: + - name: DR1 + description: Data register bank 1 + array: + len: 10 + stride: 4 + byte_offset: 0 + fieldset: DR + - name: RTCCR + description: RTC clock calibration register + byte_offset: 40 + fieldset: RTCCR + - name: CR + description: Control register + byte_offset: 44 + fieldset: CR + - name: CSR + description: Control/status register + byte_offset: 48 + fieldset: CSR + - name: DR2 + description: Data register bank 2 + array: + len: 32 + stride: 4 + byte_offset: 60 + fieldset: DR +fieldset/DR: + description: Data register + fields: + - name: D + description: Backup data + bit_offset: 0 + bit_size: 16 +fieldset/CR: + description: Control register + fields: + - name: TPE + description: Tamper pin enable + bit_offset: 0 + bit_size: 1 + enum: TPE + - name: TPAL + description: Tamper pin active level + bit_offset: 1 + bit_size: 1 + enum: TPAL +fieldset/CSR: + description: Control/status register + fields: + - name: CTE + description: Clear Tamper event + bit_offset: 0 + bit_size: 1 + enum_write: CTEW + - name: CTI + description: Clear Tamper Interrupt + bit_offset: 1 + bit_size: 1 + enum_write: CTIW + - name: TPIE + description: "Tamper Pin interrupt\r enable" + bit_offset: 2 + bit_size: 1 + enum: TPIE + - name: TEF + description: Tamper Event Flag + bit_offset: 8 + bit_size: 1 + - name: TIF + description: Tamper Interrupt Flag + bit_offset: 9 + bit_size: 1 +fieldset/RTCCR: + description: RTC clock calibration register + fields: + - name: CAL + description: Calibration value + bit_offset: 0 + bit_size: 7 + - name: CCO + description: Calibration Clock Output + bit_offset: 7 + bit_size: 1 + - name: ASOE + description: Alarm or second output enable + bit_offset: 8 + bit_size: 1 + - name: ASOS + description: Alarm or second output selection + bit_offset: 9 + bit_size: 1 + enum: ASOS +enum/ASOS: + bit_size: 1 + variants: + - name: Alarm + description: RTC Alarm pulse output selected + value: 0 + - name: Second + description: RTC Second pulse output selected + value: 1 +enum/CTEW: + bit_size: 1 + variants: + - name: Reset + description: Reset the TEF Tamper event flag (and the Tamper detector) + value: 1 +enum/CTIW: + bit_size: 1 + variants: + - name: Clear + description: Clear the Tamper interrupt and the TIF Tamper interrupt flag + value: 1 +enum/TPAL: + bit_size: 1 + variants: + - name: High + description: A high level on the TAMPER pin resets all data backup registers (if TPE bit is set) + value: 0 + - name: Low + description: A low level on the TAMPER pin resets all data backup registers (if TPE bit is set) + value: 1 +enum/TPE: + bit_size: 1 + variants: + - name: General + description: The TAMPER pin is free for general purpose I/O + value: 0 + - name: Alternate + description: Tamper alternate I/O function is activated + value: 1 +enum/TPIE: + bit_size: 1 + variants: + - name: Disabled + description: Tamper interrupt disabled + value: 0 + - name: Enabled + description: Tamper interrupt enabled (the TPE bit must also be set in the BKP_CR register) + value: 1 diff --git a/stm32data/__main__.py b/stm32data/__main__.py index 6e500ed..1a32e4b 100755 --- a/stm32data/__main__.py +++ b/stm32data/__main__.py @@ -152,6 +152,7 @@ perimap = [ ('.*:LTDC:lcdtft1_v1_1', ('ltdc', 'v1', 'LTDC')), ('.*:MDIOS:mdios1_v1_0', ('mdios', 'v1', 'MDIOS')), ('.*:QUADSPI:quadspi1_v1_0', ('quadspi', 'v1', 'QUADSPI')), + ('STM32F1.*:BKP.*', ('bkp', 'v1', 'BKP')), ('.*:RTC:rtc2_v2_6', ('rtc', 'v2', 'RTC')), ('.*:RTC:rtc2_v2_WB', ('rtc', 'wb', 'RTC')), ('.*:SAI:sai1_v1_1', ('sai', 'v1', 'SAI')), @@ -299,7 +300,7 @@ peri_rename = { ghost_peris = [ 'GPIOA', 'GPIOB', 'GPIOC', 'GPIOD', 'GPIOE', 'GPIOF', 'GPIOG', 'GPIOH', 'GPIOI', 'GPIOJ', 'GPIOK', 'GPIOL', 'GPIOM', 'GPION', 'GPIOO', 'GPIOP', 'GPIOQ', 'GPIOR', 'GPIOS', 'GPIOT', 'DMA1', 'DMA2', 'BDMA', 'DMAMUX', 'DMAMUX1', 'DMAMUX2', - 'SYSCFG', 'EXTI', 'FLASH', 'DBGMCU', 'CRS', 'PWR', 'AFIO', + 'SYSCFG', 'EXTI', 'FLASH', 'DBGMCU', 'CRS', 'PWR', 'AFIO', 'BKP', ] alt_peri_defines = { From f0e27880b9eaae8de88531dee752db2136e1a50f Mon Sep 17 00:00:00 2001 From: chemicstry Date: Fri, 3 Jun 2022 10:26:58 +0300 Subject: [PATCH 2/3] Cleanup --- data/registers/bkp_v1.yaml | 22 +--------------------- 1 file changed, 1 insertion(+), 21 deletions(-) diff --git a/data/registers/bkp_v1.yaml b/data/registers/bkp_v1.yaml index 2d818d4..25e295a 100644 --- a/data/registers/bkp_v1.yaml +++ b/data/registers/bkp_v1.yaml @@ -42,7 +42,6 @@ fieldset/CR: description: Tamper pin enable bit_offset: 0 bit_size: 1 - enum: TPE - name: TPAL description: Tamper pin active level bit_offset: 1 @@ -62,10 +61,9 @@ fieldset/CSR: bit_size: 1 enum_write: CTIW - name: TPIE - description: "Tamper Pin interrupt\r enable" + description: Tamper Pin interrupt enable bit_offset: 2 bit_size: 1 - enum: TPIE - name: TEF description: Tamper Event Flag bit_offset: 8 @@ -124,21 +122,3 @@ enum/TPAL: - name: Low description: A low level on the TAMPER pin resets all data backup registers (if TPE bit is set) value: 1 -enum/TPE: - bit_size: 1 - variants: - - name: General - description: The TAMPER pin is free for general purpose I/O - value: 0 - - name: Alternate - description: Tamper alternate I/O function is activated - value: 1 -enum/TPIE: - bit_size: 1 - variants: - - name: Disabled - description: Tamper interrupt disabled - value: 0 - - name: Enabled - description: Tamper interrupt enabled (the TPE bit must also be set in the BKP_CR register) - value: 1 From 22386bae0c91efc18152fdb8bfc99a793e3bc6e8 Mon Sep 17 00:00:00 2001 From: chemicstry Date: Sat, 4 Jun 2022 21:18:48 +0300 Subject: [PATCH 3/3] Use offsets for non-contiguous array --- data/registers/bkp_v1.yaml | 56 ++++++++++++++++++++++++++++++-------- 1 file changed, 45 insertions(+), 11 deletions(-) diff --git a/data/registers/bkp_v1.yaml b/data/registers/bkp_v1.yaml index 25e295a..f02d004 100644 --- a/data/registers/bkp_v1.yaml +++ b/data/registers/bkp_v1.yaml @@ -2,11 +2,52 @@ block/BKP: description: Backup registers items: - - name: DR1 - description: Data register bank 1 + - name: DR + description: Data register array: - len: 10 - stride: 4 + offsets: + - 0 + - 4 + - 8 + - 12 + - 16 + - 20 + - 24 + - 28 + - 32 + - 36 + - 60 + - 64 + - 68 + - 72 + - 76 + - 80 + - 84 + - 88 + - 92 + - 96 + - 100 + - 104 + - 108 + - 112 + - 116 + - 120 + - 124 + - 128 + - 132 + - 136 + - 140 + - 144 + - 148 + - 152 + - 156 + - 160 + - 164 + - 168 + - 172 + - 176 + - 180 + - 184 byte_offset: 0 fieldset: DR - name: RTCCR @@ -21,13 +62,6 @@ block/BKP: description: Control/status register byte_offset: 48 fieldset: CSR - - name: DR2 - description: Data register bank 2 - array: - len: 32 - stride: 4 - byte_offset: 60 - fieldset: DR fieldset/DR: description: Data register fields: