apply transform

This commit is contained in:
eZio Pan 2024-03-31 17:14:34 +08:00
parent b87360cd61
commit 187a8d68af
2 changed files with 39 additions and 174 deletions

View File

@ -220,38 +220,13 @@ fieldset/SCCR:
fieldset/SECCFGR:
description: PWR security configuration register.
fields:
- name: WUP1SEC
- name: WUPSEC
description: WUPx secure protection.
bit_offset: 0
bit_size: 1
- name: WUP2SEC
description: WUPx secure protection.
bit_offset: 1
bit_size: 1
- name: WUP3SEC
description: WUPx secure protection.
bit_offset: 2
bit_size: 1
- name: WUP4SEC
description: WUPx secure protection.
bit_offset: 3
bit_size: 1
- name: WUP5SEC
description: WUPx secure protection.
bit_offset: 4
bit_size: 1
- name: WUP6SEC
description: WUPx secure protection.
bit_offset: 5
bit_size: 1
- name: WUP7SEC
description: WUPx secure protection.
bit_offset: 6
bit_size: 1
- name: WUP8SEC
description: WUPx secure protection.
bit_offset: 7
bit_size: 1
array:
len: 8
stride: 1
- name: RETSEC
description: retention secure protection.
bit_offset: 11
@ -357,169 +332,44 @@ fieldset/VOSSR:
fieldset/WUCR:
description: PWR wakeup configuration register.
fields:
- name: WUPEN1
- name: WUPEN
description: 'enable wakeup pin WUPx These bits are set and cleared by software. Note: an additional wakeup event is detected if WUPx pin is enabled (by setting the WUPENx bit) when WUPx pin level is already high when WUPPx selects rising edge, or low when WUPPx selects falling edge.'
bit_offset: 0
bit_size: 1
- name: WUPEN2
description: 'enable wakeup pin WUPx These bits are set and cleared by software. Note: an additional wakeup event is detected if WUPx pin is enabled (by setting the WUPENx bit) when WUPx pin level is already high when WUPPx selects rising edge, or low when WUPPx selects falling edge.'
bit_offset: 1
bit_size: 1
- name: WUPEN3
description: 'enable wakeup pin WUPx These bits are set and cleared by software. Note: an additional wakeup event is detected if WUPx pin is enabled (by setting the WUPENx bit) when WUPx pin level is already high when WUPPx selects rising edge, or low when WUPPx selects falling edge.'
bit_offset: 2
bit_size: 1
- name: WUPEN4
description: 'enable wakeup pin WUPx These bits are set and cleared by software. Note: an additional wakeup event is detected if WUPx pin is enabled (by setting the WUPENx bit) when WUPx pin level is already high when WUPPx selects rising edge, or low when WUPPx selects falling edge.'
bit_offset: 3
bit_size: 1
- name: WUPEN5
description: 'enable wakeup pin WUPx These bits are set and cleared by software. Note: an additional wakeup event is detected if WUPx pin is enabled (by setting the WUPENx bit) when WUPx pin level is already high when WUPPx selects rising edge, or low when WUPPx selects falling edge.'
bit_offset: 4
bit_size: 1
- name: WUPEN6
description: 'enable wakeup pin WUPx These bits are set and cleared by software. Note: an additional wakeup event is detected if WUPx pin is enabled (by setting the WUPENx bit) when WUPx pin level is already high when WUPPx selects rising edge, or low when WUPPx selects falling edge.'
bit_offset: 5
bit_size: 1
- name: WUPEN7
description: 'enable wakeup pin WUPx These bits are set and cleared by software. Note: an additional wakeup event is detected if WUPx pin is enabled (by setting the WUPENx bit) when WUPx pin level is already high when WUPPx selects rising edge, or low when WUPPx selects falling edge.'
bit_offset: 6
bit_size: 1
- name: WUPEN8
description: 'enable wakeup pin WUPx These bits are set and cleared by software. Note: an additional wakeup event is detected if WUPx pin is enabled (by setting the WUPENx bit) when WUPx pin level is already high when WUPPx selects rising edge, or low when WUPPx selects falling edge.'
bit_offset: 7
bit_size: 1
- name: WUPP1
array:
len: 8
stride: 1
- name: WUPP
description: wakeup pin polarity bit for WUPx These bits define the polarity used for event detection on WUPx external wakeup pin.
bit_offset: 8
bit_size: 1
- name: WUPP2
description: wakeup pin polarity bit for WUPx These bits define the polarity used for event detection on WUPx external wakeup pin.
bit_offset: 9
bit_size: 1
- name: WUPP3
description: wakeup pin polarity bit for WUPx These bits define the polarity used for event detection on WUPx external wakeup pin.
bit_offset: 10
bit_size: 1
- name: WUPP4
description: wakeup pin polarity bit for WUPx These bits define the polarity used for event detection on WUPx external wakeup pin.
bit_offset: 11
bit_size: 1
- name: WUPP5
description: wakeup pin polarity bit for WUPx These bits define the polarity used for event detection on WUPx external wakeup pin.
bit_offset: 12
bit_size: 1
- name: WUPP6
description: wakeup pin polarity bit for WUPx These bits define the polarity used for event detection on WUPx external wakeup pin.
bit_offset: 13
bit_size: 1
- name: WUPP7
description: wakeup pin polarity bit for WUPx These bits define the polarity used for event detection on WUPx external wakeup pin.
bit_offset: 14
bit_size: 1
- name: WUPP8
description: wakeup pin polarity bit for WUPx These bits define the polarity used for event detection on WUPx external wakeup pin.
bit_offset: 15
bit_size: 1
- name: WUPPUPD1
array:
len: 8
stride: 1
- name: WUPPUPD
description: wakeup pin pull configuration for WKUPx These bits define the I/O pad pull configuration used when WUPENx = 1. The associated GPIO port pull configuration must be set to the same value or to 00. The wakeup pin pull configuration is kept in Standby mode.
bit_offset: 16
bit_size: 2
- name: WUPPUPD2
description: wakeup pin pull configuration for WKUPx These bits define the I/O pad pull configuration used when WUPENx = 1. The associated GPIO port pull configuration must be set to the same value or to 00. The wakeup pin pull configuration is kept in Standby mode.
bit_offset: 18
bit_size: 2
- name: WUPPUPD3
description: wakeup pin pull configuration for WKUPx These bits define the I/O pad pull configuration used when WUPENx = 1. The associated GPIO port pull configuration must be set to the same value or to 00. The wakeup pin pull configuration is kept in Standby mode.
bit_offset: 20
bit_size: 2
- name: WUPPUPD4
description: wakeup pin pull configuration for WKUPx These bits define the I/O pad pull configuration used when WUPENx = 1. The associated GPIO port pull configuration must be set to the same value or to 00. The wakeup pin pull configuration is kept in Standby mode.
bit_offset: 22
bit_size: 2
- name: WUPPUPD5
description: wakeup pin pull configuration for WKUPx These bits define the I/O pad pull configuration used when WUPENx = 1. The associated GPIO port pull configuration must be set to the same value or to 00. The wakeup pin pull configuration is kept in Standby mode.
bit_offset: 24
bit_size: 2
- name: WUPPUPD6
description: wakeup pin pull configuration for WKUPx These bits define the I/O pad pull configuration used when WUPENx = 1. The associated GPIO port pull configuration must be set to the same value or to 00. The wakeup pin pull configuration is kept in Standby mode.
bit_offset: 26
bit_size: 2
- name: WUPPUPD7
description: wakeup pin pull configuration for WKUPx These bits define the I/O pad pull configuration used when WUPENx = 1. The associated GPIO port pull configuration must be set to the same value or to 00. The wakeup pin pull configuration is kept in Standby mode.
bit_offset: 28
bit_size: 2
- name: WUPPUPD8
description: wakeup pin pull configuration for WKUPx These bits define the I/O pad pull configuration used when WUPENx = 1. The associated GPIO port pull configuration must be set to the same value or to 00. The wakeup pin pull configuration is kept in Standby mode.
bit_offset: 30
bit_size: 2
array:
len: 8
stride: 2
fieldset/WUSCR:
description: PWR wakeup status clear register.
fields:
- name: CWUF1
- name: CWUF
description: clear wakeup pin flag for WUFx These bits are always read as 0.
bit_offset: 0
bit_size: 1
- name: CWUF2
description: clear wakeup pin flag for WUFx These bits are always read as 0.
bit_offset: 1
bit_size: 1
- name: CWUF3
description: clear wakeup pin flag for WUFx These bits are always read as 0.
bit_offset: 2
bit_size: 1
- name: CWUF4
description: clear wakeup pin flag for WUFx These bits are always read as 0.
bit_offset: 3
bit_size: 1
- name: CWUF5
description: clear wakeup pin flag for WUFx These bits are always read as 0.
bit_offset: 4
bit_size: 1
- name: CWUF6
description: clear wakeup pin flag for WUFx These bits are always read as 0.
bit_offset: 5
bit_size: 1
- name: CWUF7
description: clear wakeup pin flag for WUFx These bits are always read as 0.
bit_offset: 6
bit_size: 1
- name: CWUF8
description: clear wakeup pin flag for WUFx These bits are always read as 0.
bit_offset: 7
bit_size: 1
array:
len: 8
stride: 1
fieldset/WUSR:
description: PWR wakeup status register.
fields:
- name: WUF1
- name: WUF
description: wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register.
bit_offset: 0
bit_size: 1
- name: WUF2
description: wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register.
bit_offset: 1
bit_size: 1
- name: WUF3
description: wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register.
bit_offset: 2
bit_size: 1
- name: WUF4
description: wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register.
bit_offset: 3
bit_size: 1
- name: WUF5
description: wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register.
bit_offset: 4
bit_size: 1
- name: WUF6
description: wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register.
bit_offset: 5
bit_size: 1
- name: WUF7
description: wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register.
bit_offset: 6
bit_size: 1
- name: WUF8
description: wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register.
bit_offset: 7
bit_size: 1
array:
len: 8
stride: 1

View File

@ -1,3 +1,18 @@
transforms:
- !DeleteEnums
from: ^(PRIV|RRSB|SEC|RADIORSB|REGPARDYVDDRFPA)$
- !MakeFieldArray
fieldsets: WUSC?R
from: (C?WUF)\d
to: $1
- !MakeFieldArray
fieldsets: WUCR
from: (WUPEN|WUPP(UPD)?)\d
to: $1
- !MakeFieldArray
fieldsets: SECCFGR
from: (WUP)\d(SEC)
to: $1$2