diff --git a/data/dmamux/G0_DMAMUX1.yaml b/data/dmamux/G0_DMAMUX1.yaml new file mode 100644 index 0000000..e94ed54 --- /dev/null +++ b/data/dmamux/G0_DMAMUX1.yaml @@ -0,0 +1,77 @@ +GENERATOR0: 1 +GENERATOR1: 2 +GENERATOR2: 3 +GENERATOR3: 4 +ADC1: 5 +AES_IN: 6 +AES_OUT: 7 +DAC1_CH1: 8 +DAC1_CH2: 9 +I2C1_RX: 10 +I2C1_TX: 11 +I2C2_RX: 12 +I2C2_TX: 13 +LPUART1_RX: 14 +LPUART1_TX: 15 +SPI1_RX: 16 +SPI1_TX: 17 +SPI2_RX: 18 +SPI2_TX: 19 +TIM1_CH1: 20 +TIM1_CH2: 21 +TIM1_CH3: 22 +TIM1_CH4: 23 +TIM1_TRIG_COM: 24 +TIM1_UP: 25 +TIM2_CH1: 26 +TIM2_CH2: 27 +TIM2_CH3: 28 +TIM2_CH4: 29 +TIM2_TRIG: 30 +TIM2_UP: 31 +TIM3_CH1: 32 +TIM3_CH2: 33 +TIM3_CH3: 34 +TIM3_CH4: 35 +TIM3_TRIG: 36 +TIM3_UP: 37 +TIM6_UP: 38 +TIM7_UP: 39 +TIM15_CH1: 40 +TIM15_CH2: 41 +TIM15_TRIG_COM: 42 +TIM15_UP: 43 +TIM16_CH1: 44 +TIM16_COM: 45 +TIM16_UP: 46 +TIM17_CH1: 47 +TIM17_COM: 48 +TIM17_UP: 49 +USART1_RX: 50 +USART1_TX: 51 +USART2_RX: 52 +USART2_TX: 53 +USART3_RX: 54 +USART3_TX: 55 +USART4_RX: 56 +USART4_TX: 57 +UCPD1_RX: 58 +UCPD1_TX: 59 +UCPD2_RX: 60 +UCPD2_TX: 61 +I2C3_RX: 62 +I2C3_TX: 63 +LPUART2_RX: 64 +LPUART2_TX: 65 +SPI3_RX: 66 +SPI3_TX: 67 +TIM4_CH1: 68 +TIM4_CH2: 69 +TIM4_CH3: 70 +TIM4_CH4: 71 +TIM4_TRIG: 72 +TIM4_UP: 73 +USART5_RX: 74 +USART5_TX: 75 +USART6_RX: 76 +USART6_TX: 77 diff --git a/data/dmamux/G4_DMAMUX1.yaml b/data/dmamux/G4_DMAMUX1.yaml new file mode 100644 index 0000000..daa30d1 --- /dev/null +++ b/data/dmamux/G4_DMAMUX1.yaml @@ -0,0 +1,115 @@ +GENERATOR0: 1 +GENERATOR1: 2 +GENERATOR2: 3 +GENERATOR3: 4 +ADC1: 5 +DAC1_CHANNEL1: 6 +DAC1_CHANNEL2: 7 +TIM6_UP: 8 +TIM7_UP: 9 +SPI1_RX: 10 +SPI1_TX: 11 +SPI2_RX: 12 +SPI2_TX: 13 +SPI3_RX: 14 +SPI3_TX: 15 +I2C1_RX: 16 +I2C1_TX: 17 +I2C2_RX: 18 +I2C2_TX: 19 +I2C3_RX: 20 +I2C3_TX: 21 +I2C4_RX: 22 +I2C4_TX: 23 +USART1_RX: 24 +USART1_TX: 25 +USART2_RX: 26 +USART2_TX: 27 +USART3_RX: 28 +USART3_TX: 29 +UART4_RX: 30 +UART4_TX: 31 +UART5_RX: 32 +UART5_TX: 33 +LPUART1_RX: 34 +LPUART1_TX: 35 +ADC2: 36 +ADC3: 37 +ADC4: 38 +ADC5: 39 +QUADSPI: 40 +DAC2_CHANNEL1: 41 +TIM1_CH1: 42 +TIM1_CH2: 43 +TIM1_CH3: 44 +TIM1_CH4: 45 +TIM1_UP: 46 +TIM1_TRIG: 47 +TIM1_COM: 48 +TIM8_CH1: 49 +TIM8_CH2: 50 +TIM8_CH3: 51 +TIM8_CH4: 52 +TIM8_UP: 53 +TIM8_TRIG: 54 +TIM8_COM: 55 +TIM2_CH1: 56 +TIM2_CH2: 57 +TIM2_CH3: 58 +TIM2_CH4: 59 +TIM2_UP: 60 +TIM3_CH1: 61 +TIM3_CH2: 62 +TIM3_CH3: 63 +TIM3_CH4: 64 +TIM3_UP: 65 +TIM3_TRIG: 66 +TIM4_CH1: 67 +TIM4_CH2: 68 +TIM4_CH3: 69 +TIM4_CH4: 70 +TIM4_UP: 71 +TIM5_CH1: 72 +TIM5_CH2: 73 +TIM5_CH3: 74 +TIM5_CH4: 75 +TIM5_UP: 76 +TIM5_TRIG: 77 +TIM15_CH1: 78 +TIM15_UP: 79 +TIM15_TRIG: 80 +TIM15_COM: 81 +TIM16_CH1: 82 +TIM16_UP: 83 +TIM17_CH1: 84 +TIM17_UP: 85 +TIM20_CH1: 86 +TIM20_CH2: 87 +TIM20_CH3: 88 +TIM20_CH4: 89 +TIM20_UP: 90 +AES_IN: 91 +AES_OUT: 92 +TIM20_TRIG: 93 +TIM20_COM: 94 +HRTIM1_M: 95 +HRTIM1_A: 96 +HRTIM1_B: 97 +HRTIM1_C: 98 +HRTIM1_D: 99 +HRTIM1_E: 100 +HRTIM1_F: 101 +DAC3_CHANNEL1: 102 +DAC3_CHANNEL2: 103 +DAC4_CHANNEL1: 104 +DAC4_CHANNEL2: 105 +SPI4_RX: 106 +SPI4_TX: 107 +SAI1_A: 108 +SAI1_B: 109 +FMAC_READ: 110 +FMAC_WRITE: 111 +CORDIC_READ: 112 +CORDIC_WRITE: 113 +UCPD1_RX: 114 +UCPD1_TX: 115 diff --git a/data/dmamux/H7_DMAMUX1.yaml b/data/dmamux/H7_DMAMUX1.yaml new file mode 100644 index 0000000..b357650 --- /dev/null +++ b/data/dmamux/H7_DMAMUX1.yaml @@ -0,0 +1,136 @@ +GENERATOR0: 1 +GENERATOR1: 2 +GENERATOR2: 3 +GENERATOR3: 4 +GENERATOR4: 5 +GENERATOR5: 6 +GENERATOR6: 7 +GENERATOR7: 8 +ADC1: 9 +ADC2: 10 +TIM1_CH1: 11 +TIM1_CH2: 12 +TIM1_CH3: 13 +TIM1_CH4: 14 +TIM1_UP: 15 +TIM1_TRIG: 16 +TIM1_COM: 17 +TIM2_CH1: 18 +TIM2_CH2: 19 +TIM2_CH3: 20 +TIM2_CH4: 21 +TIM2_UP: 22 +TIM3_CH1: 23 +TIM3_CH2: 24 +TIM3_CH3: 25 +TIM3_CH4: 26 +TIM3_UP: 27 +TIM3_TRIG: 28 +TIM4_CH1: 29 +TIM4_CH2: 30 +TIM4_CH3: 31 +TIM4_UP: 32 +I2C1_RX: 33 +I2C1_TX: 34 +I2C2_RX: 35 +I2C2_TX: 36 +SPI1_RX: 37 +SPI1_TX: 38 +SPI2_RX: 39 +SPI2_TX: 40 +USART1_RX: 41 +USART1_TX: 42 +USART2_RX: 43 +USART2_TX: 44 +USART3_RX: 45 +USART3_TX: 46 +TIM8_CH1: 47 +TIM8_CH2: 48 +TIM8_CH3: 49 +TIM8_CH4: 50 +TIM8_UP: 51 +TIM8_TRIG: 52 +TIM8_COM: 53 +TIM5_CH1: 55 +TIM5_CH2: 56 +TIM5_CH3: 57 +TIM5_CH4: 58 +TIM5_UP: 59 +TIM5_TRIG: 60 +SPI3_RX: 61 +SPI3_TX: 62 +UART4_RX: 63 +UART4_TX: 64 +UART5_RX: 65 +UART5_TX: 66 +DAC1_CH1: 67 +DAC1_CH2: 68 +TIM6_UP: 69 +TIM7_UP: 70 +USART6_RX: 71 +USART6_TX: 72 +I2C3_RX: 73 +I2C3_TX: 74 +DCMI_PSSI: 75 +CRYP_IN: 76 +CRYP_OUT: 77 +HASH_IN: 78 +UART7_RX: 79 +UART7_TX: 80 +UART8_RX: 81 +UART8_TX: 82 +SPI4_RX: 83 +SPI4_TX: 84 +SPI5_RX: 85 +SPI5_TX: 86 +SAI1_A: 87 +SAI1_B: 88 +SAI2_A: 89 +SAI2_B: 90 +SWPMI_RX: 91 +SWPMI_TX: 92 +SPDIF_RX_DT: 93 +SPDIF_RX_CS: 94 +HRTIM_MASTER: 95 +HRTIM_TIMER_A: 96 +HRTIM_TIMER_B: 97 +HRTIM_TIMER_C: 98 +HRTIM_TIMER_D: 99 +HRTIM_TIMER_E: 100 +DFSDM1_FLT0: 101 +DFSDM1_FLT1: 102 +DFSDM1_FLT2: 103 +DFSDM1_FLT3: 104 +TIM15_CH1: 105 +TIM15_UP: 106 +TIM15_TRIG: 107 +TIM15_COM: 108 +TIM16_CH1: 109 +TIM16_UP: 110 +TIM17_CH1: 111 +TIM17_UP: 112 +SAI3_A: 113 +SAI3_B: 114 +ADC3: 115 +UART9_RX: 116 +UART9_TX: 117 +USART10_RX: 118 +USART10_TX: 119 +FMAC_READ: 120 +FMAC_WRITE: 121 +CORDIC_READ: 122 +CORDIC_WRITE: 123 +I2C5_RX: 124 +I2C5_TX: 125 +TIM23_CH1: 126 +TIM23_CH2: 127 +TIM23_CH3: 128 +TIM23_CH4: 129 +TIM23_UP: 130 +TIM23_TRIG: 131 +TIM24_CH1: 132 +TIM24_CH2: 133 +TIM24_CH3: 134 +TIM24_CH4: 135 +TIM24_UP: 136 +TIM24_TRIG: 137 diff --git a/data/dmamux/H7_DMAMUX2.yaml b/data/dmamux/H7_DMAMUX2.yaml new file mode 100644 index 0000000..04c7844 --- /dev/null +++ b/data/dmamux/H7_DMAMUX2.yaml @@ -0,0 +1,19 @@ +GENERATOR0: 1 +GENERATOR1: 2 +GENERATOR2: 3 +GENERATOR3: 4 +GENERATOR4: 5 +GENERATOR5: 6 +GENERATOR6: 7 +GENERATOR7: 8 +LPUART1_RX: 9 +LPUART1_TX: 10 +SPI6_RX: 11 +SPI6_TX: 12 +I2C4_RX: 13 +I2C4_TX: 14 +SAI4_A: 15 +SAI4_B: 16 +ADC3: 17 +DAC2_CH1: 17 +DFSDM2_FLT0: 18 diff --git a/data/dmamux/L4PQ_DMAMUX1.yaml b/data/dmamux/L4PQ_DMAMUX1.yaml new file mode 100644 index 0000000..185030d --- /dev/null +++ b/data/dmamux/L4PQ_DMAMUX1.yaml @@ -0,0 +1,92 @@ +GENERATOR0: 1 +GENERATOR1: 2 +GENERATOR2: 3 +GENERATOR3: 4 +ADC1: 5 +ADC2: 6 +DAC1_CH1: 7 +DAC1_CH2: 8 +TIM6_UP: 9 +TIM7_UP: 10 +SPI1_RX: 11 +SPI1_TX: 12 +SPI2_RX: 13 +SPI2_TX: 14 +SPI3_RX: 15 +SPI3_TX: 16 +I2C1_RX: 17 +I2C1_TX: 18 +I2C2_RX: 19 +I2C2_TX: 20 +I2C3_RX: 21 +I2C3_TX: 22 +I2C4_RX: 23 +I2C4_TX: 24 +USART1_RX: 25 +USART1_TX: 26 +USART2_RX: 27 +USART2_TX: 28 +USART3_RX: 29 +USART3_TX: 30 +UART4_RX: 31 +UART4_TX: 32 +UART5_RX: 33 +UART5_TX: 34 +LPUART1_RX: 35 +LPUART1_TX: 36 +SAI1_A: 37 +SAI1_B: 38 +SAI2_A: 39 +SAI2_B: 40 +OCTOSPI1: 41 +OCTOSPI2: 42 +TIM1_CH1: 43 +TIM1_CH2: 44 +TIM1_CH3: 45 +TIM1_CH4: 46 +TIM1_UP: 47 +TIM1_TRIG: 48 +TIM1_COM: 49 +TIM8_CH1: 50 +TIM8_CH2: 51 +TIM8_CH3: 52 +TIM8_CH4: 53 +TIM8_UP: 54 +TIM8_TRIG: 55 +TIM8_COM: 56 +TIM2_CH1: 57 +TIM2_CH2: 58 +TIM2_CH3: 59 +TIM2_CH4: 60 +TIM2_UP: 61 +TIM3_CH1: 62 +TIM3_CH2: 63 +TIM3_CH3: 64 +TIM3_CH4: 65 +TIM3_UP: 66 +TIM3_TRIG: 67 +TIM4_CH1: 68 +TIM4_CH2: 69 +TIM4_CH3: 70 +TIM4_CH4: 71 +TIM4_UP: 72 +TIM5_CH1: 73 +TIM5_CH2: 74 +TIM5_CH3: 75 +TIM5_CH4: 76 +TIM5_UP: 77 +TIM5_TRIG: 78 +TIM15_CH1: 79 +TIM15_UP: 80 +TIM15_TRIG: 81 +TIM15_COM: 82 +TIM16_CH1: 83 +TIM16_UP: 84 +TIM17_CH1: 85 +TIM17_UP: 86 +DFSDM1_FLT0: 87 +DFSDM1_FLT1: 88 +DCMI_PSSI: 91 +AES_IN: 92 +AES_OUT: 93 +HASH_IN: 94 diff --git a/data/dmamux/L4RS_DMAMUX1.yaml b/data/dmamux/L4RS_DMAMUX1.yaml new file mode 100644 index 0000000..b9d50cf --- /dev/null +++ b/data/dmamux/L4RS_DMAMUX1.yaml @@ -0,0 +1,93 @@ +GENERATOR0: 1 +GENERATOR1: 2 +GENERATOR2: 3 +GENERATOR3: 4 +ADC1: 5 +DAC1_CH1: 6 +DAC1_CH2: 7 +TIM6_UP: 8 +TIM7_UP: 9 +SPI1_RX: 10 +SPI1_TX: 11 +SPI2_RX: 12 +SPI2_TX: 13 +SPI3_RX: 14 +SPI3_TX: 15 +I2C1_RX: 16 +I2C1_TX: 17 +I2C2_RX: 18 +I2C2_TX: 19 +I2C3_RX: 20 +I2C3_TX: 21 +I2C4_RX: 22 +I2C4_TX: 23 +USART1_RX: 24 +USART1_TX: 25 +USART2_RX: 26 +USART2_TX: 27 +USART3_RX: 28 +USART3_TX: 29 +UART4_RX: 30 +UART4_TX: 31 +UART5_RX: 32 +UART5_TX: 33 +LPUART1_RX: 34 +LPUART1_TX: 35 +SAI1_A: 36 +SAI1_B: 37 +SAI2_A: 38 +SAI2_B: 39 +OCTOSPI1: 40 +OCTOSPI2: 41 +TIM1_CH1: 42 +TIM1_CH2: 43 +TIM1_CH3: 44 +TIM1_CH4: 45 +TIM1_UP: 46 +TIM1_TRIG: 47 +TIM1_COM: 48 +TIM8_CH1: 49 +TIM8_CH2: 50 +TIM8_CH3: 51 +TIM8_CH4: 52 +TIM8_UP: 53 +TIM8_TRIG: 54 +TIM8_COM: 55 +TIM2_CH1: 56 +TIM2_CH2: 57 +TIM2_CH3: 58 +TIM2_CH4: 59 +TIM2_UP: 60 +TIM3_CH1: 61 +TIM3_CH2: 62 +TIM3_CH3: 63 +TIM3_CH4: 64 +TIM3_UP: 65 +TIM3_TRIG: 66 +TIM4_CH1: 67 +TIM4_CH2: 68 +TIM4_CH3: 69 +TIM4_CH4: 70 +TIM4_UP: 71 +TIM5_CH1: 72 +TIM5_CH2: 73 +TIM5_CH3: 74 +TIM5_CH4: 75 +TIM5_UP: 76 +TIM5_TRIG: 77 +TIM15_CH1: 78 +TIM15_UP: 79 +TIM15_TRIG: 80 +TIM15_COM: 81 +TIM16_CH1: 82 +TIM16_UP: 83 +TIM17_CH1: 84 +TIM17_UP: 85 +DFSDM1_FLT0: 86 +DFSDM1_FLT1: 87 +DFSDM1_FLT2: 88 +DFSDM1_FLT3: 89 +DCMI_PSSI: 90 +AES_IN: 91 +AES_OUT: 92 +HASH_IN: 93 \ No newline at end of file diff --git a/data/dmamux/L5_DMAMUX1.yaml b/data/dmamux/L5_DMAMUX1.yaml new file mode 100644 index 0000000..0db37a0 --- /dev/null +++ b/data/dmamux/L5_DMAMUX1.yaml @@ -0,0 +1,94 @@ +GENERATOR0: 1 +GENERATOR1: 2 +GENERATOR2: 3 +GENERATOR3: 4 +ADC1: 5 +ADC2: 6 +DAC1_CH1: 7 +DAC1_CH2: 8 +TIM6_UP: 9 +TIM7_UP: 10 +SPI1_RX: 11 +SPI1_TX: 12 +SPI2_RX: 13 +SPI2_TX: 14 +SPI3_RX: 15 +SPI3_TX: 16 +I2C1_RX: 17 +I2C1_TX: 18 +I2C2_RX: 19 +I2C2_TX: 20 +I2C3_RX: 21 +I2C3_TX: 22 +I2C4_RX: 23 +I2C4_TX: 24 +USART1_RX: 25 +USART1_TX: 26 +USART2_RX: 27 +USART2_TX: 28 +USART3_RX: 29 +USART3_TX: 30 +UART4_RX: 31 +UART4_TX: 32 +UART5_RX: 33 +UART5_TX: 34 +LPUART1_RX: 35 +LPUART1_TX: 36 +SAI1_A: 37 +SAI1_B: 38 +SAI2_A: 39 +SAI2_B: 40 +OCTOSPI1: 41 +TIM1_CH1: 42 +TIM1_CH2: 43 +TIM1_CH3: 44 +TIM1_CH4: 45 +TIM1_UP: 46 +TIM1_TRIG: 47 +TIM1_COM: 48 +TIM8_CH1: 49 +TIM8_CH2: 50 +TIM8_CH3: 51 +TIM8_CH4: 52 +TIM8_UP: 53 +TIM8_TRIG: 54 +TIM8_COM: 55 +TIM2_CH1: 56 +TIM2_CH2: 57 +TIM2_CH3: 58 +TIM2_CH4: 59 +TIM2_UP: 60 +TIM3_CH1: 61 +TIM3_CH2: 62 +TIM3_CH3: 63 +TIM3_CH4: 64 +TIM3_UP: 65 +TIM3_TRIG: 66 +TIM4_CH1: 67 +TIM4_CH2: 68 +TIM4_CH3: 69 +TIM4_CH4: 70 +TIM4_UP: 71 +TIM5_CH1: 72 +TIM5_CH2: 73 +TIM5_CH3: 74 +TIM5_CH4: 75 +TIM5_UP: 76 +TIM5_TRIG: 77 +TIM15_CH1: 78 +TIM15_UP: 79 +TIM15_TRIG: 80 +TIM15_COM: 81 +TIM16_CH1: 82 +TIM16_UP: 83 +TIM17_CH1: 84 +TIM17_UP: 85 +DFSDM1_FLT0: 86 +DFSDM1_FLT1: 87 +DFSDM1_FLT2: 88 +DFSDM1_FLT3: 89 +AES_IN: 90 +AES_OUT: 91 +HASH_IN: 92 +UCPD1_TX: 93 +UCPD1_RX: 94 diff --git a/data/dmamux/WB_DMAMUX1.yaml b/data/dmamux/WB_DMAMUX1.yaml new file mode 100644 index 0000000..c852916 --- /dev/null +++ b/data/dmamux/WB_DMAMUX1.yaml @@ -0,0 +1,40 @@ +GENERATOR0: 1 +GENERATOR1: 2 +GENERATOR2: 3 +GENERATOR3: 4 +ADC1: 5 +SPI1_RX: 6 +SPI1_TX: 7 +SPI2_RX: 8 +SPI2_TX: 9 +I2C1_RX: 10 +I2C1_TX: 11 +I2C3_RX: 12 +I2C3_TX: 13 +USART1_RX: 14 +USART1_TX: 15 +LPUART1_RX: 16 +LPUART1_TX: 17 +SAI1_A: 18 +SAI1_B: 19 +QUADSPI: 20 +TIM1_CH1: 21 +TIM1_CH2: 22 +TIM1_CH3: 23 +TIM1_CH4: 24 +TIM1_UP: 25 +TIM1_TRIG: 26 +TIM1_COM: 27 +TIM2_CH1: 28 +TIM2_CH2: 29 +TIM2_CH3: 30 +TIM2_CH4: 31 +TIM2_UP: 32 +TIM16_CH1: 33 +TIM16_UP: 34 +TIM17_CH1: 35 +TIM17_UP: 36 +AES1_IN: 37 +AES1_OUT: 38 +AES2_IN: 39 +AES2_OUT: 40 diff --git a/data/dmamux/WL_DMAMUX1.yaml b/data/dmamux/WL_DMAMUX1.yaml new file mode 100644 index 0000000..4bb61be --- /dev/null +++ b/data/dmamux/WL_DMAMUX1.yaml @@ -0,0 +1,42 @@ +GENERATOR0: 1 +GENERATOR1: 2 +GENERATOR2: 3 +GENERATOR3: 4 +ADC: 5 +DAC_OUT1: 6 +SPI1_RX: 7 +SPI1_TX: 8 +SPI2_RX: 9 +SPI2_TX: 10 +I2C1_RX: 11 +I2C1_TX: 12 +I2C2_RX: 13 +I2C2_TX: 14 +I2C3_RX: 15 +I2C3_TX: 16 +USART1_RX: 17 +USART1_TX: 18 +USART2_RX: 19 +USART2_TX: 20 +LPUART1_RX: 21 +LPUART1_TX: 22 +TIM1_CH1: 23 +TIM1_CH2: 24 +TIM1_CH3: 25 +TIM1_CH4: 26 +TIM1_UP: 27 +TIM1_TRIG: 28 +TIM1_COM: 29 +TIM2_CH1: 30 +TIM2_CH2: 31 +TIM2_CH3: 32 +TIM2_CH4: 33 +TIM2_UP: 34 +TIM16_CH1: 35 +TIM16_UP: 36 +TIM17_CH1: 37 +TIM17_UP: 38 +AES_IN: 39 +AES_OUT: 40 +SUBGHZSPI_RX: 41 +SUBGHZSPI_TX: 42 diff --git a/parse.py b/parse.py index 7362132..796dea1 100755 --- a/parse.py +++ b/parse.py @@ -1,5 +1,6 @@ #!/usr/bin/env python3 +import sys import xmltodict import yaml try: @@ -440,95 +441,6 @@ def parse_headers(): headers_parsed[ff] = res -dma_request_headers_parsed = {} - -def adjust_dma_requests(chip_name, pname, requests): - adjusted = {} - - if (dma_request_header := find_dma_request_header(chip_name)) is not None: - for (request, original) in requests.items(): - define_name = 'DMA_REQUEST_' + pname - if pname != request: - define_name += '_' + request - define = dma_request_header['defines']['all'].get(define_name) - if define is None: - if request == 'RD': - define_name = 'DMA_REQUEST_' + pname + '_READ' - if request == 'WR': - define_name = 'DMA_REQUEST_' + pname + '_WRITE' - define = dma_request_header['defines']['all'].get(define_name) - - if define == 0: - # check the _ll maybe - if (dmamux_request_header := find_dmamux_request_header(chip_name)) is not None: - define_name = 'LL_DMAMUX_REQ_' + pname - if pname != request: - define_name += '_' + request - define = dmamux_request_header['defines']['all'].get(define_name) - if define is None: - if request == 'RD': - define_name = 'LL_DMAMUX_REQ_' + pname + '_READ' - if request == 'WR': - define_name = 'LL_DMAMUX_REQ_' + pname + '_WRITE' - define = dmamux_request_header['defines']['all'].get(define_name) - - if define is not None: - adjusted[request] = define - else: - adjusted[request] = original - return adjusted - else: - return requests - -def find_dma_request_header(chip_name): - target = chip_name.lower() - for (name, headers) in dma_request_headers_parsed.items(): - if target.startswith(name): - return headers - return None - -def find_dmamux_request_header(chip_name): - target = chip_name.lower() - for (name, headers) in dma_request_headers_parsed.items(): - if name.endswith("_ll") and target.startswith(removesuffix(name, '_ll')): - return headers - return None - - -def parse_dma_request_headers(): - os.makedirs('sources/dma_headers_parsed', exist_ok=True) - print("loading dma request headers...") - for f in glob('./sources/git/*/Drivers/*/Inc/*_hal_dma.h'): - last_slash = f.rfind('/') - ff = f[last_slash + 1:] - ff = removesuffix(ff, "xx_hal_dma.h") - - try: - with open('sources/dma_headers_parsed/{}.json'.format(ff), 'r') as j: - res = json.load(j) - except: - res = parse_header(f) - with open('sources/dma_headers_parsed/{}.json'.format(ff), 'w') as j: - json.dump(res, j) - - dma_request_headers_parsed[ff] = res - - for f in glob('./sources/git/*/Drivers/*/Inc/*_ll_dma.h'): - last_slash = f.rfind('/') - ff = f[last_slash + 1:] - ff = removesuffix(ff, "xx_ll_dma.h") - - try: - with open('sources/dma_headers_parsed/{}.json'.format(ff), 'r') as j: - res = json.load(j) - except: - res = parse_header(f) - with open('sources/dma_headers_parsed/{}.json'.format(ff), 'w') as j: - json.dump(res, j) - - dma_request_headers_parsed[ff + '_ll'] = res - - def chip_name_from_package_name(x): name_map = [ ('(STM32L1....).x([AX])', '\\1-\\2'), @@ -558,6 +470,9 @@ def parse_chips(): for f in sorted(glob('sources/cubedb/mcu/STM32*.xml')): if 'STM32MP' in f: continue + if len(sys.argv) > 1: + if not sys.argv[1] in f: + continue print(f) r = xmltodict.parse(open(f, 'rb'))['Mcu'] @@ -693,6 +608,9 @@ def parse_chips(): pins[peri_name].append(entry) for chip_name, chip in chips.items(): + if len(sys.argv) > 1: + if not chip_name.startswith(sys.argv[1]): + continue print(f'* processing chip {chip_name}') rcc = chip['rcc'] del chip['rcc'] @@ -721,14 +639,7 @@ def parse_chips(): defines = h['defines'][core_name] core['interrupts'] = interrupts - core['dma_channels'] = {} - if chip_dma in dma_channels: - core['dma_channels'].update(dma_channels[chip_dma]['channels']) - if chip_bdma in dma_channels: - core['dma_channels'].update(dma_channels[chip_bdma]['channels']) - # print("INterrupts for", core, ":", interrupts) - #print("Defines for", core, ":", defines) - + peris = {} for pname, pkind in chip['peripherals'].items(): addr = defines.get(pname) @@ -757,12 +668,6 @@ def parse_chips(): if len(chip['pins'][pname]) > 0: p['pins'] = chip['pins'][pname] - if pname in dma_channels[chip_dma]['peripherals']: - if 'channels' in dma_channels[chip_dma]['peripherals'][pname]: - p['dma_channels'] = dma_channels[chip_dma]['peripherals'][pname]['channels'] - if 'requests' in dma_channels[chip_dma]['peripherals'][pname]: - p['dma_requests'] = adjust_dma_requests(chip_name, pname, dma_channels[chip_dma]['peripherals'][pname]['requests']) - peris[pname] = p family_extra = "data/extra/family/" + chip['family'] + ".yaml" @@ -866,6 +771,37 @@ def parse_chips(): if (peri_clock := match_peri_clock(rcc_block, name)) is not None: core['peripherals'][name]['clock'] = peri_clock + + # Process DMA channels + chs = {} + if chip_dma in dma_channels: + chs.update(dma_channels[chip_dma]['channels']) + if chip_bdma in dma_channels: + chs.update(dma_channels[chip_bdma]['channels']) + + # The dma_channels[xx] is generic for multiple chips. The current chip may have less DMAs, + # so we have to filter it. + chs = { + name: ch + for (name, ch) in chs.items() + if ch['dma'] in peris + } + core['dma_channels'] = chs + + # Process peripheral - DMA channel associations + for pname, p in peris.items(): + if (peri_chs := dma_channels[chip_dma]['peripherals'].get(pname)) is not None: + + p['dma_channels'] = { + req: [ + ch + for ch in req_chs + if ('channel' not in ch) or ch['channel'] in chs + ] + for req, req_chs in peri_chs.items() + } + + # remove all pins from the root of the chip before emitting. del chip['pins'] del chip['peripherals'] @@ -923,12 +859,14 @@ def parse_gpio_af(): dma_channels = {} - def parse_dma(): for f in glob('sources/cubedb/mcu/IP/*DMA-*Modes.xml'): + is_explicitly_bdma = False ff = removeprefix(f, 'sources/cubedb/mcu/IP/') if not ( ff.startswith('B') or ff.startswith( 'D' ) ): continue + if ff.startswith("BDMA"): + is_explicitly_bdma = True ff = removeprefix(ff, 'DMA-') ff = removeprefix(ff, 'BDMA-') ff = removesuffix(ff, '_Modes.xml') @@ -946,37 +884,60 @@ def parse_dma(): continue channels = dma['ModeLogicOperator']['Mode'] if len(channels) == 1: - requests = next(filter(lambda x: x['@Name'] == 'Request', r['IP']['RefParameter'])) - request_num = 0 - for request in requests['PossibleValue']: - target_name = request['@Comment'] - parts = target_name.split('_') - target_peri_name = parts[0] - if len(parts) < 2: - event = target_peri_name - else: - event = target_name.split('_')[1] - if target_name != 'MEMTOMEM': + # ========== CHIP WITH DMAMUX + + dmamux_file = ff[5:7] + if ff.startswith('STM32L4P'): dmamux_file = 'L4PQ' + if ff.startswith('STM32L4S'): dmamux_file = 'L4RS' + for mf in glob('data/dmamux/{}_*.yaml'.format(dmamux_file)): + with open(mf, 'r') as yaml_file: + y = yaml.load(yaml_file, Loader=SafeLoader) + mf = removesuffix(mf, '.yaml') + dmamux = mf[mf.index('_')+1:] # DMAMUX1 or DMAMUX2 + + for (request_name, request_num) in y.items(): + parts = request_name.split('_') + target_peri_name = parts[0] + if len(parts) < 2: + request = target_peri_name + else: + request = parts[1] + if target_peri_name not in chip_dma['peripherals']: chip_dma['peripherals'][target_peri_name] = {} peri_dma = chip_dma['peripherals'][target_peri_name] - if 'requests' not in peri_dma: - peri_dma['requests'] = {} - if event not in peri_dma['requests']: - peri_dma['requests'][event] = request_num - request_num += 1 + if request not in peri_dma: + peri_dma[request] = [] + peri_dma[request].append({ + "dmamux": dmamux, + "request": request_num, + }) + + dmamux = 'DMAMUX1' + if is_explicitly_bdma: dmamux = 'DMAMUX2' + + dmamux_channel = 0 for n in dma_peri_name.split(","): n = n.strip() if result := re.match('.*' + n + '_(Channel|Stream)\[(\d+)-(\d+)\]', channels[0]['@Name']): low = int(result.group(2)) high = int(result.group(3)) + # Make sure all channels numbers start at 0 + if low == 1: + low -= 1 + high -= 1 for i in range(low, high+1): - chip_dma['channels'][n+'_'+str(i)] = OrderedDict({ + chip_dma['channels'][n+'_CH'+str(i)] = OrderedDict({ 'dma': n, 'channel': i, + 'dmamux': dmamux, + 'dmamux_channel': dmamux_channel, }) + dmamux_channel += 1 else: + # ========== CHIP WITHOUT DMAMUX + # see if we can scrape out requests requests = {} @@ -999,7 +960,7 @@ def parse_dma(): channel_name = removeprefix(channel_name, "Stream") channel_names.append(channel_name) - chip_dma['channels'][dma_peri_name + '_' + channel_name] = OrderedDict({ + chip_dma['channels'][dma_peri_name + '_CH' + channel_name] = OrderedDict({ 'dma': dma_peri_name, 'channel': int(channel_name), }) @@ -1011,36 +972,32 @@ def parse_dma(): parts = target_name.split('_') target_peri_name = parts[0] if len(parts) < 2: - target_events = [target_peri_name] + target_requests = [target_peri_name] else: - target_events = target_name.split('_')[1].split('/') + target_requests = target_name.split('_')[1].split('/') if target_name != 'MEMTOMEM': if target_peri_name not in chip_dma['peripherals']: chip_dma['peripherals'][target_peri_name] = {} peri_dma = chip_dma['peripherals'][target_peri_name] - for event in target_events: - if ':' in event: - event = event.split(':')[0] - if 'channels' not in peri_dma: - peri_dma['channels'] = {} - if event not in peri_dma['channels']: - peri_dma['channels'][event] = [] - event_dma = peri_dma['channels'][event] + for request in target_requests: + if ':' in request: + request = request.split(':')[0] + if request not in peri_dma: + peri_dma[request] = [] entry = OrderedDict({ - 'channel': dma_peri_name + '_' + channel_name, + 'channel': dma_peri_name + '_CH' + channel_name, }) if original_target_name in requests: entry['request'] = requests[original_target_name] - event_dma.append(entry) + peri_dma[request].append(entry) # Make sure all channels numbers start at 0 if min(map(int, channel_names)) != 0: for name in channel_names: - chip_dma['channels'][dma_peri_name + '_' + name]['channel'] -= 1 + chip_dma['channels'][dma_peri_name + '_CH' + name]['channel'] -= 1 dma_channels[ff] = chip_dma - clocks = {} def parse_clocks(): @@ -1093,7 +1050,6 @@ def match_peri_clock(rcc_block, peri_name): return match_peri_clock(rcc_block, removesuffix(peri_name, "1")) return None -parse_dma_request_headers() parse_rcc_regs() parse_documentations() parse_dma()