SPI v2 first draft.
This commit is contained in:
Bob McWhirter
parent
f5c3c8cea1
commit
0de8be5be4
329
data/registers/spi_v2.yaml
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329
data/registers/spi_v2.yaml
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---
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block/SPI:
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description: Serial peripheral interface/Inter-IC sound
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items:
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- name: CR1
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description: control register 1
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byte_offset: 0
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fieldset: CR1
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- name: CR2
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description: control register 2
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byte_offset: 4
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fieldset: CR2
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- name: SR
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description: status register
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byte_offset: 8
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fieldset: SR
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- name: DR
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description: data register
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byte_offset: 12
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fieldset: DR
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- name: CRCPR
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description: CRC polynomial register
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byte_offset: 16
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fieldset: CRCPR
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- name: RXCRCR
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description: RX CRC register
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byte_offset: 20
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access: Read
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fieldset: RXCRCR
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- name: TXCRCR
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description: TX CRC register
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byte_offset: 24
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access: Read
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fieldset: TXCRCR
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fieldset/CR1:
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description: control register 1
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fields:
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- name: CPHA
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description: Clock phase
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bit_offset: 0
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bit_size: 1
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enum: CPHA
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- name: CPOL
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description: Clock polarity
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bit_offset: 1
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bit_size: 1
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enum: CPOL
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- name: MSTR
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description: Master selection
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bit_offset: 2
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bit_size: 1
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enum: MSTR
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- name: BR
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description: Baud rate control
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bit_offset: 3
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bit_size: 3
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enum: BR
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- name: SPE
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description: SPI enable
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bit_offset: 6
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bit_size: 1
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- name: LSBFIRST
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description: Frame format
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bit_offset: 7
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bit_size: 1
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enum: LSBFIRST
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- name: SSI
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description: Internal slave select
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bit_offset: 8
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bit_size: 1
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- name: SSM
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description: Software slave management
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bit_offset: 9
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bit_size: 1
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- name: RXONLY
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description: Receive only
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bit_offset: 10
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bit_size: 1
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enum: RXONLY
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- name: CRCL
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description: CRC length
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bit_offset: 11
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bit_size: 1
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- name: CRCNEXT
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description: CRC transfer next
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bit_offset: 12
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bit_size: 1
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enum: CRCNEXT
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- name: CRCEN
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description: Hardware CRC calculation enable
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bit_offset: 13
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bit_size: 1
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- name: BIDIOE
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description: Output enable in bidirectional mode
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bit_offset: 14
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bit_size: 1
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enum: BIDIOE
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- name: BIDIMODE
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description: Bidirectional data mode enable
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bit_offset: 15
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bit_size: 1
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enum: BIDIMODE
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fieldset/CR2:
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description: control register 2
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fields:
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- name: RXDMAEN
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description: Rx buffer DMA enable
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bit_offset: 0
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bit_size: 1
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- name: TXDMAEN
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description: Tx buffer DMA enable
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bit_offset: 1
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bit_size: 1
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- name: SSOE
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description: SS output enable
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bit_offset: 2
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bit_size: 1
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- name: NSSP
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description: NSS pulse management
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bit_offset: 3
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bit_size: 1
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- name: FRF
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description: Frame format
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bit_offset: 4
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bit_size: 1
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- name: ERRIE
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description: Error interrupt enable
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bit_offset: 5
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bit_size: 1
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- name: RXNEIE
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description: RX buffer not empty interrupt enable
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bit_offset: 6
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bit_size: 1
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- name: TXEIE
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description: Tx buffer empty interrupt enable
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bit_offset: 7
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bit_size: 1
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- name: DS
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description: Data size
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bit_offset: 8
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bit_size: 4
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- name: FRXTH
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description: FIFO reception threshold
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bit_offset: 12
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bit_size: 1
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- name: LDMA_RX
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description: Last DMA transfer for reception
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bit_offset: 13
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bit_size: 1
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- name: LDMA_TX
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description: Last DMA transfer for transmission
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bit_offset: 14
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bit_size: 1
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fieldset/CRCPR:
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description: CRC polynomial register
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fields:
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- name: CRCPOLY
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description: CRC polynomial register
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bit_offset: 0
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bit_size: 16
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fieldset/DR:
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description: data register
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fields:
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- name: DR
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description: Data register
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bit_offset: 0
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bit_size: 16
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fieldset/RXCRCR:
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description: RX CRC register
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fields:
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- name: RxCRC
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description: Rx CRC register
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bit_offset: 0
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bit_size: 16
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fieldset/SR:
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description: status register
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fields:
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- name: RXNE
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description: Receive buffer not empty
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bit_offset: 0
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bit_size: 1
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- name: TXE
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description: Transmit buffer empty
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bit_offset: 1
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bit_size: 1
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- name: CRCERR
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description: CRC error flag
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bit_offset: 4
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bit_size: 1
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- name: MODF
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description: Mode fault
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bit_offset: 5
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bit_size: 1
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- name: OVR
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description: Overrun flag
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bit_offset: 6
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bit_size: 1
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- name: BSY
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description: Busy flag
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bit_offset: 7
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bit_size: 1
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enum_read: BSYR
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- name: FRE
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description: Frame format error
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bit_offset: 8
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bit_size: 1
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- name: FRLVL
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description: FIFO reception level
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bit_offset: 9
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bit_size: 2
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- name: FTLVL
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description: FIFO transmission level
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bit_offset: 11
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bit_size: 2
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fieldset/TXCRCR:
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description: TX CRC register
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fields:
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- name: TxCRC
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description: Tx CRC register
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bit_offset: 0
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bit_size: 16
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enum/BIDIMODE:
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bit_size: 1
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variants:
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- name: Unidirectional
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description: 2-line unidirectional data mode selected
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value: 0
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- name: Bidirectional
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description: 1-line bidirectional data mode selected
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value: 1
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enum/BIDIOE:
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bit_size: 1
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variants:
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- name: OutputDisabled
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description: Output disabled (receive-only mode)
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value: 0
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- name: OutputEnabled
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description: Output enabled (transmit-only mode)
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value: 1
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enum/BR:
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bit_size: 3
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variants:
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- name: Div2
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description: f_PCLK / 2
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value: 0
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- name: Div4
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description: f_PCLK / 4
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value: 1
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- name: Div8
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description: f_PCLK / 8
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value: 2
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- name: Div16
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description: f_PCLK / 16
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value: 3
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- name: Div32
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description: f_PCLK / 32
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value: 4
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- name: Div64
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description: f_PCLK / 64
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value: 5
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- name: Div128
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description: f_PCLK / 128
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value: 6
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- name: Div256
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description: f_PCLK / 256
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value: 7
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enum/BSYR:
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bit_size: 1
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variants:
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- name: NotBusy
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description: SPI not busy
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value: 0
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- name: Busy
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description: SPI busy
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value: 1
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enum/CPHA:
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bit_size: 1
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variants:
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- name: FirstEdge
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description: The first clock transition is the first data capture edge
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value: 0
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- name: SecondEdge
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description: The second clock transition is the first data capture edge
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value: 1
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enum/CPOL:
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bit_size: 1
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variants:
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- name: IdleLow
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description: CK to 0 when idle
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value: 0
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- name: IdleHigh
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description: CK to 1 when idle
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value: 1
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enum/CRCNEXT:
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bit_size: 1
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variants:
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- name: TxBuffer
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description: Next transmit value is from Tx buffer
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value: 0
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- name: CRC
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description: Next transmit value is from Tx CRC register
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value: 1
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enum/LSBFIRST:
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bit_size: 1
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variants:
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- name: MSBFirst
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description: Data is transmitted/received with the MSB first
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value: 0
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- name: LSBFirst
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description: Data is transmitted/received with the LSB first
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value: 1
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enum/MSTR:
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bit_size: 1
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variants:
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- name: Slave
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description: Slave configuration
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value: 0
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- name: Master
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description: Master configuration
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value: 1
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enum/RXONLY:
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bit_size: 1
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variants:
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- name: FullDuplex
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description: Full duplex (Transmit and receive)
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value: 0
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- name: OutputDisabled
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description: Output disabled (Receive-only mode)
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value: 1
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