diff --git a/data/registers/spi_f1.yaml b/data/registers/spi_f1.yaml
index a6425d6..324b8f1 100644
--- a/data/registers/spi_f1.yaml
+++ b/data/registers/spi_f1.yaml
@@ -128,7 +128,6 @@ fieldset/CR2:
       description: Error interrupt enable
       bit_offset: 5
       bit_size: 1
-      enum: ERRIE
     - name: RXNEIE
       description: RX buffer not empty interrupt enable
       bit_offset: 6
@@ -173,7 +172,7 @@ fieldset/I2SCFGR:
       description: I2S standard selection
       bit_offset: 4
       bit_size: 2
-      enum: ISSTD
+      enum: I2SSTD
     - name: PCMSYNC
       description: PCM frame synchronization
       bit_offset: 7
@@ -183,7 +182,7 @@ fieldset/I2SCFGR:
       description: I2S configuration mode
       bit_offset: 8
       bit_size: 2
-      enum: ISCFG
+      enum: I2SCFG
     - name: I2SE
       description: I2S Enable
       bit_offset: 10
@@ -192,7 +191,6 @@ fieldset/I2SCFGR:
       description: I2S mode selection
       bit_offset: 11
       bit_size: 1
-      enum: ISMOD
 fieldset/I2SPR:
   description: I2S prescaler register
   fields:
@@ -248,7 +246,6 @@ fieldset/SR:
       description: Overrun flag
       bit_offset: 6
       bit_size: 1
-      enum_read: OVRR
     - name: BSY
       description: Busy flag
       bit_offset: 7
@@ -380,16 +377,7 @@ enum/DFF:
     - name: SixteenBit
       description: 16-bit data frame format is selected for transmission/reception
       value: 1
-enum/ERRIE:
-  bit_size: 1
-  variants:
-    - name: Masked
-      description: Error interrupt masked
-      value: 0
-    - name: NotMasked
-      description: Error interrupt not masked
-      value: 1
-enum/ISCFG:
+enum/I2SCFG:
   bit_size: 2
   variants:
     - name: SlaveTx
@@ -404,16 +392,7 @@ enum/ISCFG:
     - name: MasterRx
       description: Master - receive
       value: 3
-enum/ISMOD:
-  bit_size: 1
-  variants:
-    - name: SPIMode
-      description: SPI mode is selected
-      value: 0
-    - name: I2SMode
-      description: I2S mode is selected
-      value: 1
-enum/ISSTD:
+enum/I2SSTD:
   bit_size: 2
   variants:
     - name: Philips
@@ -455,15 +434,6 @@ enum/ODD:
     - name: Odd
       description: Real divider value is (I2SDIV * 2) + 1
       value: 1
-enum/OVRR:
-  bit_size: 1
-  variants:
-    - name: NoOverrun
-      description: No overrun occurred
-      value: 0
-    - name: Overrun
-      description: Overrun occurred
-      value: 1
 enum/PCMSYNC:
   bit_size: 1
   variants:
diff --git a/data/registers/spi_v1.yaml b/data/registers/spi_v1.yaml
index 45b8ad1..753a612 100644
--- a/data/registers/spi_v1.yaml
+++ b/data/registers/spi_v1.yaml
@@ -32,6 +32,14 @@ block/SPI:
       byte_offset: 24
       access: Read
       fieldset: TXCRCR
+    - name: I2SCFGR
+      description: I2S configuration register
+      byte_offset: 28
+      fieldset: I2SCFGR
+    - name: I2SPR
+      description: I2S prescaler register
+      byte_offset: 32
+      fieldset: I2SPR
 fieldset/CR1:
   description: control register 1
   fields:
@@ -147,6 +155,63 @@ fieldset/DR:
       description: Data register
       bit_offset: 0
       bit_size: 16
+fieldset/I2SCFGR:
+  description: I2S configuration register
+  fields:
+    - name: CHLEN
+      description: Channel length (number of bits per audio channel)
+      bit_offset: 0
+      bit_size: 1
+      enum: CHLEN
+    - name: DATLEN
+      description: Data length to be transferred
+      bit_offset: 1
+      bit_size: 2
+      enum: DATLEN
+    - name: CKPOL
+      description: Steady state clock polarity
+      bit_offset: 3
+      bit_size: 1
+      enum: CKPOL
+    - name: I2SSTD
+      description: I2S standard selection
+      bit_offset: 4
+      bit_size: 2
+      enum: I2SSTD
+    - name: PCMSYNC
+      description: PCM frame synchronization
+      bit_offset: 7
+      bit_size: 1
+      enum: PCMSYNC
+    - name: I2SCFG
+      description: I2S configuration mode
+      bit_offset: 8
+      bit_size: 2
+      enum: I2SCFG
+    - name: I2SE
+      description: I2S Enable
+      bit_offset: 10
+      bit_size: 1
+    - name: I2SMOD
+      description: I2S mode selection
+      bit_offset: 11
+      bit_size: 1
+fieldset/I2SPR:
+  description: I2S prescaler register
+  fields:
+    - name: I2SDIV
+      description: I2S Linear prescaler
+      bit_offset: 0
+      bit_size: 8
+    - name: ODD
+      description: Odd factor for the prescaler
+      bit_offset: 8
+      bit_size: 1
+      enum: ODD
+    - name: MCKOE
+      description: Master clock output enable
+      bit_offset: 9
+      bit_size: 1
 fieldset/RXCRCR:
   description: RX CRC register
   fields:
@@ -165,6 +230,15 @@ fieldset/SR:
       description: Transmit buffer empty
       bit_offset: 1
       bit_size: 1
+    - name: CHSIDE
+      description: Channel side
+      bit_offset: 2
+      bit_size: 1
+      enum: CHSIDE
+    - name: UDR
+      description: Underrun flag
+      bit_offset: 3
+      bit_size: 1
     - name: CRCERR
       description: CRC error flag
       bit_offset: 4
@@ -185,7 +259,6 @@ fieldset/SR:
       description: TI frame format error
       bit_offset: 8
       bit_size: 1
-      enum_read: FRER
 fieldset/TXCRCR:
   description: TX CRC register
   fields:
@@ -238,6 +311,33 @@ enum/BR:
     - name: Div256
       description: f_PCLK / 256
       value: 7
+enum/CHLEN:
+  bit_size: 1
+  variants:
+    - name: SixteenBit
+      description: 16-bit wide
+      value: 0
+    - name: ThirtyTwoBit
+      description: 32-bit wide
+      value: 1
+enum/CHSIDE:
+  bit_size: 1
+  variants:
+    - name: Left
+      description: Channel left has to be transmitted or has been received
+      value: 0
+    - name: Right
+      description: Channel right has to be transmitted or has been received
+      value: 1
+enum/CKPOL:
+  bit_size: 1
+  variants:
+    - name: IdleLow
+      description: I2S clock inactive state is low level
+      value: 0
+    - name: IdleHigh
+      description: I2S clock inactive state is high level
+      value: 1
 enum/CPHA:
   bit_size: 1
   variants:
@@ -265,6 +365,18 @@ enum/CRCNEXT:
     - name: CRC
       description: Next transmit value is from Tx CRC register
       value: 1
+enum/DATLEN:
+  bit_size: 2
+  variants:
+    - name: SixteenBit
+      description: 16-bit data length
+      value: 0
+    - name: TwentyFourBit
+      description: 24-bit data length
+      value: 1
+    - name: ThirtyTwoBit
+      description: 32-bit data length
+      value: 2
 enum/DFF:
   bit_size: 1
   variants:
@@ -274,15 +386,6 @@ enum/DFF:
     - name: SixteenBit
       description: 16-bit data frame format is selected for transmission/reception
       value: 1
-enum/FRER:
-  bit_size: 1
-  variants:
-    - name: NoError
-      description: No frame format error
-      value: 0
-    - name: Error
-      description: A frame format error occurred
-      value: 1
 enum/FRF:
   bit_size: 1
   variants:
@@ -292,7 +395,7 @@ enum/FRF:
     - name: TI
       description: SPI TI mode
       value: 1
-enum/ISCFG:
+enum/I2SCFG:
   bit_size: 2
   variants:
     - name: SlaveTx
@@ -307,6 +410,21 @@ enum/ISCFG:
     - name: MasterRx
       description: Master - receive
       value: 3
+enum/I2SSTD:
+  bit_size: 2
+  variants:
+    - name: Philips
+      description: I2S Philips standard
+      value: 0
+    - name: MSB
+      description: MSB justified standard
+      value: 1
+    - name: LSB
+      description: LSB justified standard
+      value: 2
+    - name: PCM
+      description: PCM standard
+      value: 3
 enum/LSBFIRST:
   bit_size: 1
   variants:
@@ -325,6 +443,24 @@ enum/MSTR:
     - name: Master
       description: Master configuration
       value: 1
+enum/ODD:
+  bit_size: 1
+  variants:
+    - name: Even
+      description: Real divider value is I2SDIV * 2
+      value: 0
+    - name: Odd
+      description: Real divider value is (I2SDIV * 2) + 1
+      value: 1
+enum/PCMSYNC:
+  bit_size: 1
+  variants:
+    - name: Short
+      description: Short frame synchronisation
+      value: 0
+    - name: Long
+      description: Long frame synchronisation
+      value: 1
 enum/RXONLY:
   bit_size: 1
   variants: