Dario Nieuwenhuis
GitHub
commit
0bbd7c2d31
352
data/registers/flash_f4.yaml
Normal file
352
data/registers/flash_f4.yaml
Normal file
@ -0,0 +1,352 @@
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---
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block/FLASH:
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description: FLASH
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items:
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- name: ACR
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description: Flash access control register
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byte_offset: 0
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fieldset: ACR
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- name: KEYR
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description: Flash key register
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byte_offset: 4
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access: Write
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fieldset: KEYR
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- name: OPTKEYR
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description: Flash option key register
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byte_offset: 8
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access: Write
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fieldset: OPTKEYR
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- name: SR
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description: Status register
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byte_offset: 12
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fieldset: SR
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- name: CR
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description: Control register
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byte_offset: 16
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fieldset: CR
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- name: OPTCR
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description: Flash option control register
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byte_offset: 20
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fieldset: OPTCR
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fieldset/ACR:
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description: Flash access control register
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fields:
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- name: LATENCY
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description: Latency
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bit_offset: 0
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bit_size: 3
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enum: LATENCY
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- name: PRFTEN
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description: Prefetch enable
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bit_offset: 8
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bit_size: 1
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enum: PRFTEN
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- name: ICEN
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description: Instruction cache enable
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bit_offset: 9
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bit_size: 1
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enum: ICEN
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- name: DCEN
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description: Data cache enable
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bit_offset: 10
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bit_size: 1
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enum: DCEN
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- name: ICRST
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description: Instruction cache reset
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bit_offset: 11
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bit_size: 1
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enum: ICRST
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- name: DCRST
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description: Data cache reset
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bit_offset: 12
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bit_size: 1
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enum: DCRST
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fieldset/CR:
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description: Control register
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fields:
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- name: PG
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description: Programming
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bit_offset: 0
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bit_size: 1
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enum: PG
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- name: SER
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description: Sector Erase
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bit_offset: 1
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bit_size: 1
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enum: SER
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- name: MER
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description: Mass Erase
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bit_offset: 2
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bit_size: 1
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enum: MER
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- name: SNB
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description: Sector number
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bit_offset: 3
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bit_size: 4
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- name: PSIZE
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description: Program size
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bit_offset: 8
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bit_size: 2
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enum: PSIZE
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- name: STRT
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description: Start
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bit_offset: 16
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bit_size: 1
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enum: STRT
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- name: EOPIE
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description: End of operation interrupt enable
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bit_offset: 24
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bit_size: 1
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enum: EOPIE
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- name: ERRIE
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description: Error interrupt enable
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bit_offset: 25
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bit_size: 1
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enum: ERRIE
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- name: LOCK
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description: Lock
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bit_offset: 31
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bit_size: 1
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enum: LOCK
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fieldset/KEYR:
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description: Flash key register
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fields:
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- name: KEY
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description: FPEC key
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bit_offset: 0
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bit_size: 32
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fieldset/OPTCR:
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description: Flash option control register
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fields:
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- name: OPTLOCK
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description: Option lock
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bit_offset: 0
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bit_size: 1
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- name: OPTSTRT
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description: Option start
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bit_offset: 1
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bit_size: 1
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- name: BOR_LEV
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description: BOR reset Level
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bit_offset: 2
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bit_size: 2
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- name: WDG_SW
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description: WDG_SW User option bytes
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bit_offset: 5
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bit_size: 1
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- name: nRST_STOP
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description: nRST_STOP User option bytes
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bit_offset: 6
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bit_size: 1
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- name: nRST_STDBY
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description: nRST_STDBY User option bytes
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bit_offset: 7
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bit_size: 1
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- name: RDP
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description: Read protect
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bit_offset: 8
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bit_size: 8
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- name: nWRP
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description: Not write protect
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bit_offset: 16
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bit_size: 12
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fieldset/OPTKEYR:
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description: Flash option key register
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fields:
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- name: OPTKEY
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description: Option byte key
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bit_offset: 0
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bit_size: 32
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fieldset/SR:
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description: Status register
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fields:
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- name: EOP
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description: End of operation
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bit_offset: 0
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bit_size: 1
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- name: OPERR
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description: Operation error
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bit_offset: 1
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bit_size: 1
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- name: WRPERR
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description: Write protection error
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bit_offset: 4
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bit_size: 1
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- name: PGAERR
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description: Programming alignment error
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bit_offset: 5
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bit_size: 1
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- name: PGPERR
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description: Programming parallelism error
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bit_offset: 6
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bit_size: 1
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- name: PGSERR
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description: Programming sequence error
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bit_offset: 7
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bit_size: 1
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- name: BSY
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description: Busy
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bit_offset: 16
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bit_size: 1
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enum/DCEN:
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bit_size: 1
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variants:
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- name: Disabled
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description: Data cache is disabled
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value: 0
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- name: Enabled
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description: Data cache is enabled
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value: 1
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enum/DCRST:
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bit_size: 1
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variants:
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- name: NotReset
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description: Data cache is not reset
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value: 0
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- name: Reset
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description: Data cache is reset
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value: 1
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enum/EOPIE:
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bit_size: 1
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variants:
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- name: Disabled
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description: End of operation interrupt disabled
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value: 0
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- name: Enabled
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description: End of operation interrupt enabled
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value: 1
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enum/ERRIE:
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bit_size: 1
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variants:
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- name: Disabled
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description: Error interrupt generation disabled
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value: 0
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- name: Enabled
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description: Error interrupt generation enabled
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value: 1
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enum/ICEN:
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bit_size: 1
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variants:
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- name: Disabled
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description: Instruction cache is disabled
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value: 0
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- name: Enabled
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description: Instruction cache is enabled
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value: 1
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enum/ICRST:
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bit_size: 1
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variants:
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- name: NotReset
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description: Instruction cache is not reset
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value: 0
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- name: Reset
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description: Instruction cache is reset
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value: 1
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enum/LATENCY:
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bit_size: 3
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variants:
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- name: WS0
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description: 0 wait states
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value: 0
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- name: WS1
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description: 1 wait states
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value: 1
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- name: WS2
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description: 2 wait states
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value: 2
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- name: WS3
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description: 3 wait states
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value: 3
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- name: WS4
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description: 4 wait states
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value: 4
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- name: WS5
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description: 5 wait states
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value: 5
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- name: WS6
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description: 6 wait states
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value: 6
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- name: WS7
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description: 7 wait states
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value: 7
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- name: WS8
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description: 8 wait states
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value: 8
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- name: WS9
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description: 9 wait states
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value: 9
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- name: WS10
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description: 10 wait states
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value: 10
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- name: WS11
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description: 11 wait states
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value: 11
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- name: WS12
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description: 12 wait states
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value: 12
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- name: WS13
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description: 13 wait states
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value: 13
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- name: WS14
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description: 14 wait states
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value: 14
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- name: WS15
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description: 15 wait states
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value: 15
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enum/LOCK:
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bit_size: 1
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variants:
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- name: Unlocked
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description: FLASH_CR register is unlocked
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value: 0
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- name: Locked
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description: FLASH_CR register is locked
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value: 1
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enum/MER:
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bit_size: 1
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variants:
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- name: MassErase
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description: Erase activated for all user sectors
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value: 1
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enum/PG:
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bit_size: 1
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variants:
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- name: Program
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description: Flash programming activated
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value: 1
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enum/PRFTEN:
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bit_size: 1
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variants:
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- name: Disabled
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description: Prefetch is disabled
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value: 0
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- name: Enabled
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description: Prefetch is enabled
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value: 1
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enum/PSIZE:
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bit_size: 2
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variants:
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- name: PSIZE8
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description: Program x8
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value: 0
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- name: PSIZE16
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description: Program x16
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value: 1
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- name: PSIZE32
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description: Program x32
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value: 2
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- name: PSIZE64
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description: Program x64
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value: 3
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enum/SER:
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bit_size: 1
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variants:
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- name: SectorErase
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description: Erase activated for selected sector
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value: 1
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enum/STRT:
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bit_size: 1
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variants:
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- name: Start
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description: Trigger an erase operation
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value: 1
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32
parse.py
32
parse.py
@ -333,6 +333,7 @@ perimap = [
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('.*:STM32H7_pwr_v1_0', 'pwr_h7smps/PWR'),
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('.*:STM32H7_flash_v1_0', 'flash_h7/FLASH'),
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('.*:STM32F0_flash_v1_0', 'flash_f0/FLASH'),
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('.*:STM32F4_flash_v1_0', 'flash_f4/FLASH'),
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('.*TIM\d.*:gptimer.*', 'timer_v1/TIM_GP16'),
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('.*ETH:ethermac110_v3_0', 'eth_v2/ETH'),
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@ -363,6 +364,7 @@ perimap = [
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('.*:DMA', 'bdma_v1/DMA'),
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]
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def match_peri(peri):
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for r, block in perimap:
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if re.match('^'+r+'$', peri):
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@ -442,6 +444,7 @@ def parse_headers():
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headers_parsed[ff] = res
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def chip_name_from_package_name(x):
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name_map = [
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('(STM32L1....).x([AX])', '\\1-\\2'),
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@ -735,7 +738,6 @@ def parse_chips():
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dbg_peri['block'] = block
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peris[dma] = dbg_peri
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# EXTI is not in the cubedb XMLs
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if addr := defines.get('EXTI_BASE'):
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if chip_name.startswith("STM32WB55"):
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@ -792,7 +794,6 @@ def parse_chips():
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if (peri_clock := match_peri_clock(rcc_block, name)) is not None:
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core['peripherals'][name]['clock'] = peri_clock
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# Process DMA channels
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chs = {}
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if chip_dma in dma_channels:
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@ -822,7 +823,6 @@ def parse_chips():
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for req, req_chs in peri_chs.items()
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}
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# remove all pins from the root of the chip before emitting.
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del chip['pins']
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del chip['peripherals']
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@ -880,6 +880,7 @@ def parse_gpio_af():
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dma_channels = {}
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def parse_dma():
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for f in glob('sources/cubedb/mcu/IP/*DMA-*Modes.xml'):
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is_explicitly_bdma = False
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@ -908,8 +909,10 @@ def parse_dma():
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# ========== CHIP WITH DMAMUX
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dmamux_file = ff[5:7]
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if ff.startswith('STM32L4P'): dmamux_file = 'L4PQ'
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if ff.startswith('STM32L4S'): dmamux_file = 'L4RS'
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if ff.startswith('STM32L4P'):
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dmamux_file = 'L4PQ'
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if ff.startswith('STM32L4S'):
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dmamux_file = 'L4RS'
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for mf in glob('data/dmamux/{}_*.yaml'.format(dmamux_file)):
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with open(mf, 'r') as yaml_file:
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y = yaml.load(yaml_file, Loader=SafeLoader)
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@ -935,7 +938,8 @@ def parse_dma():
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})
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dmamux = 'DMAMUX1'
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if is_explicitly_bdma: dmamux = 'DMAMUX2'
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if is_explicitly_bdma:
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dmamux = 'DMAMUX2'
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dmamux_channel = 0
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for n in dma_peri_name.split(","):
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@ -1019,8 +1023,10 @@ def parse_dma():
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dma_channels[ff] = chip_dma
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clocks = {}
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def parse_clocks():
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for f in glob('sources/cubedb/mcu/IP/RCC-*rcc_v1_0_Modes.xml'):
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ff = removeprefix(f, 'sources/cubedb/mcu/IP/RCC-')
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@ -1039,8 +1045,10 @@ def parse_clocks():
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clocks[ff] = chip_clocks
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peripheral_to_clock = {}
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def parse_rcc_regs():
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print("parsing RCC registers")
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for f in glob('data/registers/rcc_*'):
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@ -1061,6 +1069,7 @@ def parse_rcc_regs():
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family_clocks[peri] = clock
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peripheral_to_clock['rcc_' + ff + '/RCC'] = family_clocks
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|
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def match_peri_clock(rcc_block, peri_name):
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if rcc_block in peripheral_to_clock:
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family_clocks = peripheral_to_clock[rcc_block]
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@ -1071,8 +1080,10 @@ def match_peri_clock(rcc_block, peri_name):
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return match_peri_clock(rcc_block, removesuffix(peri_name, "1"))
|
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return None
|
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|
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|
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chip_interrupts = {}
|
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|
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|
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def parse_interrupts():
|
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print("parsing interrupts")
|
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for f in glob('sources/cubedb/mcu/IP/NVIC-*_Modes.xml'):
|
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@ -1097,6 +1108,7 @@ def parse_interrupts():
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merge_peri_irq_signals(chip_irqs[p], split[p])
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chip_interrupts[ff] = chip_irqs
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|
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|
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def merge_peri_irq_signals(peri_irqs, additional):
|
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for key, value in additional.items():
|
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if key not in peri_irqs:
|
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@ -1111,12 +1123,14 @@ def split_interrupts(peri_names, irq_name):
|
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|
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return split
|
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|
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|
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irq_signals_map = {
|
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'I2C': ['ER', 'EV'],
|
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'TIM': ['BRK', 'UP', 'TRG', 'COM'],
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'HRTIM': ['Master', 'TIMA', 'TIMB', 'TIMC', 'TIMD', 'TIME', 'TIMF']
|
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}
|
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|
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|
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def remap_interrupt_signals(peri_name, irq_name):
|
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if peri_name == irq_name:
|
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return expand_all_irq_signals(peri_name, irq_name)
|
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@ -1125,7 +1139,7 @@ def remap_interrupt_signals(peri_name, irq_name):
|
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if peri_name in irq_name:
|
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signals = {}
|
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start = irq_name.index(peri_name)
|
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regexp = re.compile('(_[^_]+)');
|
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regexp = re.compile('(_[^_]+)')
|
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if match := regexp.findall(irq_name, start):
|
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for m in match:
|
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signal = removeprefix(m, '_').strip()
|
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@ -1137,12 +1151,14 @@ def remap_interrupt_signals(peri_name, irq_name):
|
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else:
|
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return {'GLOBAL': irq_name}
|
||||
|
||||
|
||||
def is_valid_irq_signal(peri_name, signal):
|
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for prefix, signals in irq_signals_map.items():
|
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if peri_name.startswith(prefix):
|
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return signal in signals
|
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return False
|
||||
|
||||
|
||||
def expand_all_irq_signals(peri_name, irq_name):
|
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expanded = {}
|
||||
for prefix, signals in irq_signals_map.items():
|
||||
@ -1153,6 +1169,7 @@ def expand_all_irq_signals(peri_name, irq_name):
|
||||
|
||||
return {'GLOBAL': irq_name}
|
||||
|
||||
|
||||
def filter_interrupts(peri_irqs, all_irqs):
|
||||
filtered = {}
|
||||
|
||||
@ -1165,7 +1182,6 @@ def filter_interrupts(peri_irqs, all_irqs):
|
||||
return filtered
|
||||
|
||||
|
||||
|
||||
parse_interrupts()
|
||||
parse_rcc_regs()
|
||||
parse_documentations()
|
||||
|
||||
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Reference in New Issue
Block a user