From 22dbba0af2561dfba6bbaeae8678dbecc8f48259 Mon Sep 17 00:00:00 2001
From: eZio Pan <eziopan@qq.com>
Date: Sun, 18 Feb 2024 19:04:13 +0800
Subject: [PATCH 1/2] match Cargo.lock with Cargo.toml

---
 Cargo.lock | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Cargo.lock b/Cargo.lock
index a070118..7bd0cdb 100644
--- a/Cargo.lock
+++ b/Cargo.lock
@@ -85,7 +85,7 @@ checksum = "d468802bab17cbc0cc575e9b053f41e72aa36bfa6b7f55e3529ffa43161b97fa"
 [[package]]
 name = "chiptool"
 version = "0.1.0"
-source = "git+https://github.com/embassy-rs/chiptool?rev=689341ad3437280d3553cef319d1e77470f2e704#689341ad3437280d3553cef319d1e77470f2e704"
+source = "git+https://github.com/embassy-rs/chiptool?rev=247ccbe44669ac716393247e56693a396e641e4a#247ccbe44669ac716393247e56693a396e641e4a"
 dependencies = [
  "anyhow",
  "clap",

From 76f7173b984ce1a9d2c542b5ace29f9edeb8ceab Mon Sep 17 00:00:00 2001
From: eZio Pan <eziopan@qq.com>
Date: Wed, 21 Feb 2024 21:26:48 +0800
Subject: [PATCH 2/2] remove 32bit fieldset

---
 data/registers/dcache_v1.yaml | 16 ----------------
 transforms/DCACHE.yaml        |  3 +++
 2 files changed, 3 insertions(+), 16 deletions(-)
 create mode 100644 transforms/DCACHE.yaml

diff --git a/data/registers/dcache_v1.yaml b/data/registers/dcache_v1.yaml
index a68d194..5817ed1 100644
--- a/data/registers/dcache_v1.yaml
+++ b/data/registers/dcache_v1.yaml
@@ -20,7 +20,6 @@ block/DCACHE:
   - name: RHMONR
     description: DCACHE read-hit monitor register.
     byte_offset: 16
-    fieldset: RHMONR
   - name: RMMONR
     description: DCACHE read-miss monitor register.
     byte_offset: 20
@@ -28,7 +27,6 @@ block/DCACHE:
   - name: WHMONR
     description: DCACHE write-hit monitor register.
     byte_offset: 32
-    fieldset: WHMONR
   - name: WMMONR
     description: DCACHE write-miss monitor register.
     byte_offset: 36
@@ -140,13 +138,6 @@ fieldset/IER:
     description: interrupt enable on command end Set by software to enable an interrupt generation at the end of a cache command (clean and/or invalidate an address range).
     bit_offset: 4
     bit_size: 1
-fieldset/RHMONR:
-  description: DCACHE read-hit monitor register.
-  fields:
-  - name: RHITMON
-    description: cache read-hit monitor counter.
-    bit_offset: 0
-    bit_size: 32
 fieldset/RMMONR:
   description: DCACHE read-miss monitor register.
   fields:
@@ -177,13 +168,6 @@ fieldset/SR:
     description: command end flag Cleared by writing DCACHE_FCR.CCMDENDF = 1.
     bit_offset: 4
     bit_size: 1
-fieldset/WHMONR:
-  description: DCACHE write-hit monitor register.
-  fields:
-  - name: WHITMON
-    description: cache write-hit monitor counter.
-    bit_offset: 0
-    bit_size: 32
 fieldset/WMMONR:
   description: DCACHE write-miss monitor register.
   fields:
diff --git a/transforms/DCACHE.yaml b/transforms/DCACHE.yaml
new file mode 100644
index 0000000..b82916b
--- /dev/null
+++ b/transforms/DCACHE.yaml
@@ -0,0 +1,3 @@
+transforms:
+  - !DeleteFieldsets
+    from: (R|W)HMONR