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Remove invalid bits from F4, L4 RCC

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This commit is contained in:
Timo Kröger 2021-07-30 17:35:34 +02:00
parent 68fb0eb11f
commit 074aad8a66
2 changed files with 0 additions and 12 deletions
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8
data/registers/rcc_f4.yaml
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@ -1163,10 +1163,6 @@ fieldset/AHB1ENR:
bit_size: 1
description: USB OTG HSULPI clock enable
name: OTGHSULPIEN
- bit_offset: 31
bit_size: 1
description: RNG clock enable
name: RNGEN
- bit_offset: 9
bit_size: 1
description: IO port J clock enable
@ -1353,10 +1349,6 @@ fieldset/AHB1RSTR:
bit_size: 1
description: USB OTG HS module reset
name: OTGHSRST
- bit_offset: 31
bit_size: 1
description: RNGRST
name: RNGRST
- bit_offset: 9
bit_size: 1
description: IO port J reset

4
data/registers/rcc_l4.yaml
View File

@ -616,10 +616,6 @@ fieldset/APB1ENR1:
bit_size: 1
description: USART3 clock enable
name: USART3EN
- bit_offset: 18
bit_size: 1
description: USART1 clock enable
name: USART1EN
- bit_offset: 19
bit_size: 1
description: UART4 clock enable