diff --git a/data/registers/rcc_h5.yaml b/data/registers/rcc_h5.yaml index 80358f9..f528211 100644 --- a/data/registers/rcc_h5.yaml +++ b/data/registers/rcc_h5.yaml @@ -2137,10 +2137,10 @@ enum/ADCDACSEL: - name: HSE description: hse_ck selected as kernel clock value: 3 - - name: HSI_KER + - name: HSI description: hsi_ker_ck selected as kernel clock value: 4 - - name: CSI_KER + - name: CSI description: csi_ker_ck selected as kernel clock value: 5 enum/CECSEL: @@ -2149,10 +2149,10 @@ enum/CECSEL: - name: LSE description: lse_ck selected as kernel clock (default after reset) value: 0 - - name: LSI_KER + - name: LSI description: lsi_ker_ck selected as kernel clock value: 1 - - name: CSI_KER_DIV_122 + - name: CSI_DIV_122 description: csi_ker_ck/122 selected as kernel clock value: 2 enum/CKPERSEL: @@ -2251,10 +2251,10 @@ enum/ICSEL: - name: PLL3_R description: pll3_r selected as peripheral clock value: 1 - - name: HSI_KER + - name: HSI description: hsi_ker selected as peripheral clock value: 2 - - name: CSI_KER + - name: CSI description: csi_ker selected as peripheral clock value: 3 enum/LPTIMSEL: @@ -2290,10 +2290,10 @@ enum/LPUARTSEL: - name: PLL3_1 description: pll3_q_ck selected as kernel clock value: 2 - - name: HSI_KER + - name: HSI description: hsi_ker_ck selected as kernel clock value: 3 - - name: CSI_KER + - name: CSI description: csi_ker_ck selected as kernel clock value: 4 - name: LSE @@ -3919,7 +3919,7 @@ enum/RNGSEL: - name: LSE description: lse_ck selected as kernel clock value: 2 - - name: LSI_KER + - name: LSI description: lsi_ker_ck selected as kernel clock value: 3 enum/RTCSEL: @@ -4039,10 +4039,10 @@ enum/SPI4SEL: - name: PLL3_Q description: pll3_q selected as peripheral clock value: 2 - - name: HSI_KER + - name: HSI description: hsi_ker selected as peripheral clock value: 3 - - name: CSI_KER + - name: CSI description: csi_ker selected as peripheral clock value: 4 - name: HSE @@ -4060,10 +4060,10 @@ enum/SPI5SEL: - name: PLL3_Q description: pll3_q selected as peripheral clock value: 2 - - name: HSI_KER + - name: HSI description: hsi_ker selected as peripheral clock value: 3 - - name: CSI_KER + - name: CSI description: csi_ker selected as peripheral clock value: 4 - name: HSE @@ -4072,7 +4072,7 @@ enum/SPI5SEL: enum/SPI6SEL: bit_size: 3 variants: - - name: RCC_PCLK4 + - name: APB4 description: rcc_pclk4 selected as peripheral clock value: 0 - name: PLL2_Q @@ -4081,10 +4081,10 @@ enum/SPI6SEL: - name: PLL3_Q description: pll3_q selected as peripheral clock value: 2 - - name: HSI_KER + - name: HSI description: hsi_ker selected as peripheral clock value: 3 - - name: CSI_KER + - name: CSI description: csi_ker selected as peripheral clock value: 4 - name: HSE @@ -4135,7 +4135,7 @@ enum/SYSTICKSEL: - name: HCLK_DIV_8 description: rcc_hclk/8 selected as clock source (default after reset) value: 0 - - name: LSI_KER + - name: LSI description: lsi_ker_ck[1] selected as clock source value: 1 - name: LSE @@ -4171,10 +4171,10 @@ enum/UARTSEL: - name: PLL3_Q description: pll3_q selected as peripheral clock value: 2 - - name: HSI_KER + - name: HSI description: hsi_ker selected as peripheral clock value: 3 - - name: CSI_KER + - name: CSI description: csi_ker selected as peripheral clock value: 4 - name: LSE @@ -4192,10 +4192,10 @@ enum/USARTSEL: - name: PLL3_Q description: pll3_q selected as peripheral clock value: 2 - - name: HSI_KER + - name: HSI description: hsi_ker selected as peripheral clock value: 3 - - name: CSI_KER + - name: CSI description: csi_ker selected as peripheral clock value: 4 - name: LSE diff --git a/data/registers/rcc_h50.yaml b/data/registers/rcc_h50.yaml index be34fdd..ed87a15 100644 --- a/data/registers/rcc_h50.yaml +++ b/data/registers/rcc_h50.yaml @@ -1347,10 +1347,10 @@ enum/ADCDACSEL: - name: HSE description: hse_ck selected as kernel clock value: 3 - - name: HSI_KER + - name: HSI description: hsi_ker_ck selected as kernel clock value: 4 - - name: CSI_KER + - name: CSI description: csi_ker_ck selected as kernel clock value: 5 enum/CKPERSEL: @@ -1443,22 +1443,22 @@ enum/HSIDIV: enum/ICSEL: bit_size: 2 variants: - - name: RCC_PCLK1 + - name: APB1 description: rcc_pclk1 selected as peripheral clock value: 0 - name: PLL3_R description: pll3_r selected as peripheral clock value: 1 - - name: HSI_KER + - name: HSI description: hsi_ker selected as peripheral clock value: 2 - - name: CSI_KER + - name: CSI description: csi_ker selected as peripheral clock value: 3 enum/LPTIMSEL: bit_size: 3 variants: - - name: RCC_PCLK3 + - name: APB3 description: rcc_pclk3 selected as peripheral clock value: 0 - name: PLL2_P @@ -1476,16 +1476,16 @@ enum/LPTIMSEL: enum/LPUARTSEL: bit_size: 3 variants: - - name: RCC_PCLK3 + - name: APB3 description: rcc_pclk3 selected as kernel clock (default after reset) value: 0 - name: PLL2_Q description: pll2_q_ck selected as kernel clock value: 1 - - name: HSI_KER + - name: HSI description: hsi_ker_ck selected as kernel clock value: 3 - - name: CSI_KER + - name: CSI description: csi_ker_ck selected as kernel clock value: 4 - name: LSE @@ -3087,7 +3087,7 @@ enum/RNGSEL: - name: LSE description: lse_ck selected as kernel clock value: 2 - - name: LSI_KER + - name: LSI description: lsi_ker_ck selected as kernel clock value: 3 enum/RTCSEL: @@ -3108,16 +3108,16 @@ enum/RTCSEL: enum/SPISEL: bit_size: 3 variants: - - name: RCC_PCLK4 + - name: APB4 description: rcc_pclk4 selected as peripheral clock value: 0 - name: PLL2_Q description: pll2_q selected as peripheral clock value: 1 - - name: HSI_KER + - name: HSI description: hsi_ker selected as peripheral clock value: 3 - - name: CSI_KER + - name: CSI description: csi_ker selected as peripheral clock value: 4 enum/STOPKERWUCK: @@ -3156,7 +3156,7 @@ enum/SYSTICKSEL: - name: HCLK_DIV_8 description: rcc_hclk/8 selected as clock source (default after reset) value: 0 - - name: LSI_KER + - name: LSI description: lsi_ker_ck[1] selected as clock source value: 1 - name: LSE @@ -3183,16 +3183,16 @@ enum/TIMPRE: enum/USARTSEL: bit_size: 3 variants: - - name: RCC_PCLK2 + - name: APB2 description: rcc_pclk2 selected as peripheral clock value: 0 - name: PLL2_Q description: pll2_q selected as peripheral clock value: 1 - - name: HSI_KER + - name: HSI description: hsi_ker selected as peripheral clock value: 3 - - name: CSI_KER + - name: CSI description: csi_ker selected as peripheral clock value: 4 - name: LSE diff --git a/data/registers/rcc_h7.yaml b/data/registers/rcc_h7.yaml index 690d9d7..73745b2 100644 --- a/data/registers/rcc_h7.yaml +++ b/data/registers/rcc_h7.yaml @@ -3535,7 +3535,7 @@ enum/CKPERSEL: enum/DFSDMSEL: bit_size: 1 variants: - - name: RCC_PCLK2 + - name: APB2 description: rcc_pclk2 selected as peripheral clock value: 0 - name: SYS @@ -3625,7 +3625,7 @@ enum/HSIDIV: enum/I2C1235SEL: bit_size: 2 variants: - - name: RCC_PCLK1 + - name: APB1 description: rcc_pclk1 selected as peripheral clock value: 0 - name: PLL3_R @@ -3640,7 +3640,7 @@ enum/I2C1235SEL: enum/I2C4SEL: bit_size: 2 variants: - - name: RCC_PCLK4 + - name: APB4 description: rcc_pclk4 selected as peripheral clock value: 0 - name: PLL3_R @@ -3655,7 +3655,7 @@ enum/I2C4SEL: enum/LPTIM1SEL: bit_size: 3 variants: - - name: RCC_PCLK1 + - name: APB1 description: rcc_pclk1 selected as peripheral clock value: 0 - name: PLL2_P @@ -3676,7 +3676,7 @@ enum/LPTIM1SEL: enum/LPTIM2SEL: bit_size: 3 variants: - - name: RCC_PCLK4 + - name: APB4 description: rcc_pclk4 selected as peripheral clock value: 0 - name: PLL2_P @@ -5395,7 +5395,7 @@ enum/SPI45SEL: enum/SPI6SEL: bit_size: 3 variants: - - name: RCC_PCLK4 + - name: APB4 description: rcc_pclk4 selected as peripheral clock value: 0 - name: PLL2_Q @@ -5458,7 +5458,7 @@ enum/TIMPRE: enum/USART16910SEL: bit_size: 3 variants: - - name: RCC_PCLK2 + - name: APB2 description: rcc_pclk2 selected as peripheral clock value: 0 - name: PLL2_Q @@ -5479,7 +5479,7 @@ enum/USART16910SEL: enum/USART234578SEL: bit_size: 3 variants: - - name: RCC_PCLK1 + - name: APB1 description: rcc_pclk1 selected as peripheral clock value: 0 - name: PLL2_Q diff --git a/stm32-data-gen/src/rcc.rs b/stm32-data-gen/src/rcc.rs index dc965a8..171d25f 100644 --- a/stm32-data-gen/src/rcc.rs +++ b/stm32-data-gen/src/rcc.rs @@ -17,8 +17,16 @@ impl PeripheralToClock { for (rcc_name, ir) in ®isters.registers { if let Some(rcc_name) = rcc_name.strip_prefix("rcc_") { - let checked_rccs = HashSet::from(["h5"]); - let prohibited_variants = HashSet::from(["RCC_PCLK3", "RCC_PCLK2", "RCC_PCLK1"]); + let checked_rccs = HashSet::from(["h5", "h50", "h7"]); + let prohibited_variants = HashSet::from([ + "RCC_PCLK1", + "RCC_PCLK2", + "RCC_PCLK3", + "RCC_PCLK4", + "HSI_KER", + "CSI_KER", + "LSI_KER", + ]); let rcc_enum_map: HashMap<&String, HashMap<&String, &Enum>> = { let rcc_blocks = &ir.blocks.get("RCC").unwrap().items; @@ -63,7 +71,11 @@ impl PeripheralToClock { for v in &enumm.variants { if prohibited_variants.contains(v.name.as_str()) { - return Err(anyhow!("rcc: prohibited variant name",)); + return Err(anyhow!( + "rcc: prohibited variant name {} for {}", + v.name.as_str(), + rcc_name + )); } }