From 00fc25453d9d5d04cfe507a5e4a5953d97462440 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Mon, 7 Feb 2022 01:53:58 +0100 Subject: [PATCH] switch chip files from yaml to json. remove OrderedDict. --- merge_regs.py | 11 +++-- stm32data/__main__.py | 99 +++++++++++++++++++++---------------------- stm32data/memory.py | 13 +++--- stm32data/yaml.py | 49 +++------------------ 4 files changed, 68 insertions(+), 104 deletions(-) diff --git a/merge_regs.py b/merge_regs.py index 8fbd4c2..b1e8173 100755 --- a/merge_regs.py +++ b/merge_regs.py @@ -6,15 +6,17 @@ import re import json import sys import os -from collections import OrderedDict from glob import glob + def item_key(a): return int(a["byte_offset"]) + def field_key(a): return int(a["bit_offset"]) + def merge_block(origin, new): for newval in new: found = False @@ -25,6 +27,7 @@ def merge_block(origin, new): origin.append(newval) origin.sort(key=item_key) + def merge_fields(origin, new): for newval in new: found = False @@ -35,6 +38,7 @@ def merge_fields(origin, new): origin.append(newval) origin.sort(key=field_key) + def merge_dicts(origin, new): for k, v in new.items(): if k in origin: @@ -50,8 +54,9 @@ def merge_dicts(origin, new): else: origin[k] = v -first=True -reg_map={} + +first = True +reg_map = {} for regfile in sys.argv[1:]: print("Loading", regfile) with open(regfile, 'r') as f: diff --git a/stm32data/__main__.py b/stm32data/__main__.py index 3cdd16e..c1773d7 100755 --- a/stm32data/__main__.py +++ b/stm32data/__main__.py @@ -6,11 +6,9 @@ import xmltodict import re import json import os -from collections import OrderedDict from glob import glob from stm32data import yaml, header, interrupts, memory -from stm32data.yaml import DecimalInt, HexInt from stm32data.util import * @@ -345,12 +343,12 @@ def parse_documentations(): for file in files['Files']: file_id = file['id_file'] if file_id not in all_mcu_files: - all_mcu_files[file_id] = OrderedDict({ + all_mcu_files[file_id] = { 'name': file['name'], 'title': file['title'], 'url': file['URL'], 'type': file['type'], - }) + } with open('sources/mcufinder/mcus.json', 'r', encoding='utf-8') as j: mcus = json.load(j) @@ -383,13 +381,13 @@ def documents_for(chip_name): if file := all_mcu_files.get(id): file = all_mcu_files[id] order, doc_type = parse_document_type(file['type']) - docs.append(OrderedDict({ + docs.append({ 'order': order, 'type': doc_type, 'title': file['title'], 'name': file['name'], 'url': file['url'], - })) + }) docs.sort(key=lambda x: (x['order'], x['name'])) for doc in docs: del doc['order'] @@ -554,10 +552,10 @@ def parse_chips(): 'group_idx': group_idx, 'packages': [], } - chips[chip_name]['packages'].append(OrderedDict({ + chips[chip_name]['packages'].append({ 'name': package_name, 'package': r['@Package'], - })) + }) # Some packages have some peripehrals removed because the package had to # remove GPIOs useful for that peripheral. So we merge all peripherals from all packages. @@ -610,10 +608,10 @@ def parse_chips(): cores = [] for core_xml in children(chip['xml'], 'Core'): core_name = corename(core_xml) - core = OrderedDict({ + core = { 'name': core_name, 'peripherals': [], - }) + } cores.append(core) if not core_name in h['interrupts'] or not core_name in h['defines']: @@ -668,7 +666,7 @@ def parse_chips(): # but we actually need to use it because of F1 line # which doesn't include non-remappable peripherals in GPIO xml # and some weird edge cases like STM32F030C6 (see merge_periph_pins_info) - periph_pins = OrderedDict() + periph_pins = {} for pin_name, pin in chip['pins'].items(): for signal in pin['Signal']: signal = signal['@Name'] @@ -682,7 +680,10 @@ def parse_chips(): if signal.startswith(periph + '_'): signal = removeprefix(signal, periph + '_') pins = periph_pins.setdefault(periph, []) - pins.append(OrderedDict(pin=pin_name, signal=signal)) + pins.append({ + 'pin': pin_name, + 'signal': signal, + }) break for periph, pins in periph_pins.items(): pins = remove_duplicates(pins) @@ -695,10 +696,10 @@ def parse_chips(): if addr is None: continue - p = OrderedDict({ + p = { 'name': pname, 'address': addr, - }) + } if rcc_info := match_peri_clock(rcc_block, pname): p['rcc'] = rcc_info @@ -763,14 +764,14 @@ def parse_chips(): for chip_name in group['chip_names']: chip = chips[chip_name] - flash = OrderedDict({ - 'bytes': DecimalInt(int(chip['flash']) * 1024), + flash = { + 'bytes': int(chip['flash']) * 1024, 'regions': {}, - }) - ram = OrderedDict({ - 'bytes': DecimalInt(int(chip['ram']) * 1024), + } + ram = { + 'bytes': int(chip['ram']) * 1024, 'regions': {}, - }) + } found = [] for each in memories_map['flash']: @@ -787,15 +788,15 @@ def parse_chips(): if key in found: continue found.append(key) - flash['regions'][key] = OrderedDict({ - 'base': HexInt(h['defines']['all'][each + '_BASE']) - }) + flash['regions'][key] = { + 'base': h['defines']['all'][each + '_BASE'] + } if key == 'BANK_1' or key == 'BANK_2': flash_size = memory.determine_flash_size(chip_name) if flash_size is not None: - if flash_size > flash['bytes'].val: - flash_size = flash['bytes'].val - flash['regions'][key]['bytes'] = DecimalInt(flash_size) + if flash_size > flash['bytes']: + flash_size = flash['bytes'] + flash['regions'][key]['bytes'] = flash_size found = [] for each in memories_map['ram']: if each + '_BASE' in h['defines']['all']: @@ -808,21 +809,19 @@ def parse_chips(): if key in found: continue found.append(key) - ram['regions'][key] = OrderedDict({ - 'base': HexInt(h['defines']['all'][each + '_BASE']) - }) + ram['regions'][key] = { + 'base': h['defines']['all'][each + '_BASE'] + } if key == 'SRAM': ram_size = memory.determine_ram_size(chip_name) if ram_size is not None: - ram['regions'][key]['bytes'] = DecimalInt(ram_size) + ram['regions'][key]['bytes'] = ram_size docs = documents_for(chip_name) device_id = memory.determine_device_id(chip_name) - if device_id is not None: - device_id = HexInt(device_id) - chip = OrderedDict({ + chip = { 'name': chip_name, 'family': group['family'], 'line': group['line'], @@ -833,10 +832,10 @@ def parse_chips(): 'ram': ram, 'docs': docs, 'cores': cores, - }) + } - with open('data/chips/' + chip_name + '.yaml', 'w') as f: - f.write(yaml.dump(chip, width=500)) + with open('data/chips/' + chip_name + '.json', 'w') as f: + json.dump(chip, f, indent=4) SIGNAL_REMAP = { @@ -930,10 +929,10 @@ def parse_gpio_af_f1(xml): if peri_name not in peris: peris[peri_name] = [] - peris[peri_name].append(OrderedDict({ + peris[peri_name].append({ 'pin': pin_name, 'signal': signal_name, - })) + }) for pname, p in peris.items(): p = remove_duplicates(p) @@ -965,11 +964,11 @@ def parse_gpio_af_nonf1(xml): if peri_name not in peris: peris[peri_name] = [] - peris[peri_name].append(OrderedDict({ + peris[peri_name].append({ 'pin': pin_name, 'signal': signal_name, 'af': afn, - })) + }) for pname, p in peris.items(): p = remove_duplicates(p) @@ -1049,13 +1048,13 @@ def parse_dma(): low -= 1 high -= 1 for i in range(low, high + 1): - chip_dma['channels'].append(OrderedDict({ + chip_dma['channels'].append({ 'name': n + '_CH' + str(i), 'dma': n, 'channel': i, 'dmamux': dmamux, 'dmamux_channel': dmamux_channel, - })) + }) dmamux_channel += 1 else: @@ -1083,11 +1082,11 @@ def parse_dma(): channel_name = removeprefix(channel_name, "Stream") channel_names.append(channel_name) - chip_dma['channels'].append(OrderedDict({ + chip_dma['channels'].append({ 'name': dma_peri_name + '_CH' + channel_name, 'dma': dma_peri_name, 'channel': int(channel_name), - })) + }) for target in channel['ModeLogicOperator']['Mode']: target_name = target['@Name'] original_target_name = target_name @@ -1105,10 +1104,10 @@ def parse_dma(): for request in target_requests: if ':' in request: request = request.split(':')[0] - entry = OrderedDict({ + entry = { 'signal': request, 'channel': dma_peri_name + '_CH' + channel_name, - }) + } if original_target_name in requests: entry['request'] = requests[original_target_name] chip_dma['peripherals'].setdefault(target_peri_name, []).append(entry) @@ -1145,17 +1144,17 @@ def parse_rcc_regs(): if field['name'].endswith('EN'): peri = removesuffix(field['name'], 'EN') regs = { - 'enable': OrderedDict({ + 'enable': { 'register': reg, 'field': field['name'], - }) + } } if rstr := y[key.replace('ENR', 'RSTR')]: if field := next(filter(lambda f: f['name'] == f'{peri}RST', rstr['fields']), None): - regs['reset'] = OrderedDict({ + regs['reset'] = { 'register': reg.replace('ENR', 'RSTR'), 'field': f'{peri}RST', - }) + } family_clocks[peri] = { 'clock': clock, 'registers': regs diff --git a/stm32data/memory.py b/stm32data/memory.py index 89acdd7..7815abe 100644 --- a/stm32data/memory.py +++ b/stm32data/memory.py @@ -1,7 +1,6 @@ import sys import re import xmltodict -from collections import OrderedDict from glob import glob from stm32data.util import * @@ -72,22 +71,22 @@ def parse(): flash_size = int(configs[0]['Parameters']['@size'], 16) #print( f'flash {addr} {size}') - chunk = OrderedDict({ + chunk = { 'device-id': int(device_id, 16), 'names': names, - }) + } if ram_size is not None: - chunk['ram'] = OrderedDict({ + chunk['ram'] = { 'address': ram_addr, 'bytes': ram_size, - }) + } if flash_size is not None: - chunk['flash'] = OrderedDict({ + chunk['flash'] = { 'address': flash_addr, 'bytes': flash_size, - }) + } memories.append(chunk) diff --git a/stm32data/yaml.py b/stm32data/yaml.py index 5056c49..efdb000 100644 --- a/stm32data/yaml.py +++ b/stm32data/yaml.py @@ -1,53 +1,14 @@ import yaml -from collections import OrderedDict try: from yaml import CSafeLoader as SafeLoader except ImportError: from yaml import SafeLoader - -class DecimalInt: - def __init__(self, val): - self.val = val - - -def represent_decimalint(dumper, data): - return dumper.represent_int(data.val) - - -class HexInt: - def __init__(self, val): - self.val = val - - -def represent_hexint(dumper, data): - return dumper.represent_int(hex(data.val)) - - -def represent_int(dumper, data): - if data > 0x10000: - return dumper.represent_int(hex(data)) - else: - return dumper.represent_int(data) - - -def represent_ordereddict(dumper, data): - value = [] - - for item_key, item_value in data.items(): - node_key = dumper.represent_data(item_key) - node_value = dumper.represent_data(item_value) - - value.append((node_key, node_value)) - - return yaml.nodes.MappingNode(u'tag:yaml.org,2002:map', value) - - -yaml.add_representer(DecimalInt, represent_decimalint) -yaml.add_representer(HexInt, represent_hexint) -yaml.add_representer(int, represent_int) -yaml.add_representer(OrderedDict, represent_ordereddict) +try: + from yaml import CDumper as Dumper +except ImportError: + from yaml import Dumper def load(*args, **kwargs): @@ -55,4 +16,4 @@ def load(*args, **kwargs): def dump(*args, **kwargs): - return yaml.dump(*args, **kwargs) + return yaml.dump(*args, Dumper=Dumper, sort_keys=False, **kwargs)