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Generated from stm32-data d8716bffb5dee286c8337b3c4383fa78197de7d7

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This commit is contained in:
guangzong 2024-04-14 13:31:39 -04:00
parent f4ffb2dec9
commit a25021bad0
Signed by: guangzong
GPG Key ID: 095389BACAE97D19
3 changed files with 3 additions and 3 deletions
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2
data/registers/otg_v2.json
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@ -1,5 +1,5 @@
{
"block/OTG_HS": {
"block/OTG": {
"description": "OTG_HS.",
"items": [
{

2
stm32-metapac/src/peripherals/otg_v2.rs
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@ -5,7 +5,7 @@
# [doc = "OTG_HS."]
# [derive (Copy , Clone , Eq , PartialEq)]
pub struct OtgHs { ptr : * mut u8 } unsafe impl Send for OtgHs { } unsafe impl Sync for OtgHs { } impl OtgHs { # [inline (always)]
pub struct Otg { ptr : * mut u8 } unsafe impl Send for Otg { } unsafe impl Sync for Otg { } impl Otg { # [inline (always)]
pub const unsafe fn from_ptr (ptr : * mut ()) -> Self { Self { ptr : ptr as _ , } } # [inline (always)]
pub const fn as_ptr (& self) -> * mut () { self . ptr as _ } # [doc = "Control and status register"]
# [inline (always)]

2
stm32-metapac/src/registers/otg_v2.rs
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@ -3,7 +3,7 @@
pub(crate) static REGISTERS: IR = IR {
blocks: &[
Block {
name: "OtgHs",
name: "Otg",
extends: None,
description: Some(
"OTG_HS.",